diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index 1d1b69dc08f..248246c3138 100644 --- a/src/compiler/nir/nir.h +++ b/src/compiler/nir/nir.h @@ -5891,9 +5891,6 @@ bool nir_lower_mediump_vars(nir_shader *nir, nir_variable_mode modes); bool nir_lower_mediump_io(nir_shader *nir, nir_variable_mode modes, uint64_t varying_mask, bool use_16bit_slots); bool nir_clear_mediump_io_flag(nir_shader *nir); -bool nir_force_mediump_io(nir_shader *nir, nir_variable_mode modes, - nir_alu_type types); -bool nir_unpack_16bit_varying_slots(nir_shader *nir, nir_variable_mode modes); typedef struct nir_opt_tex_srcs_options { unsigned sampler_dims; diff --git a/src/compiler/nir/nir_lower_mediump.c b/src/compiler/nir/nir_lower_mediump.c index 2e2105c1c99..546194a6ae9 100644 --- a/src/compiler/nir/nir_lower_mediump.c +++ b/src/compiler/nir/nir_lower_mediump.c @@ -314,100 +314,6 @@ nir_clear_mediump_io_flag(nir_shader *nir) return nir_shader_intrinsics_pass(nir, clear_mediump_io_flag, nir_metadata_all, NULL); } -/** - * Set the mediump precision bit for those shader inputs and outputs that are - * set in the "modes" mask. Non-generic varyings (that GLES3 doesn't have) - * are ignored. The "types" mask can be (nir_type_float | nir_type_int), etc. - */ -bool -nir_force_mediump_io(nir_shader *nir, nir_variable_mode modes, - nir_alu_type types) -{ - bool changed = false; - nir_function_impl *impl = nir_shader_get_entrypoint(nir); - assert(impl); - - nir_foreach_block_safe(block, impl) { - nir_foreach_instr_safe(instr, block) { - nir_variable_mode mode; - nir_intrinsic_instr *intr = get_io_intrinsic(instr, modes, &mode); - if (!intr) - continue; - - nir_alu_type type; - if (nir_intrinsic_has_src_type(intr)) - type = nir_intrinsic_src_type(intr); - else - type = nir_intrinsic_dest_type(intr); - if (!(type & types)) - continue; - - nir_io_semantics sem = nir_intrinsic_io_semantics(intr); - - if (nir->info.stage == MESA_SHADER_FRAGMENT && - mode == nir_var_shader_out) { - /* Only accept FS outputs. */ - if (sem.location < FRAG_RESULT_DATA0 && - sem.location != FRAG_RESULT_COLOR) - continue; - } else if (nir->info.stage == MESA_SHADER_VERTEX && - mode == nir_var_shader_in) { - /* Accept all VS inputs. */ - } else { - /* Only accept generic varyings. */ - if (sem.location < VARYING_SLOT_VAR0 || - sem.location > VARYING_SLOT_VAR31) - continue; - } - - sem.medium_precision = 1; - nir_intrinsic_set_io_semantics(intr, sem); - changed = true; - } - } - - return nir_progress(changed, impl, nir_metadata_control_flow); -} - -/** - * Remap 16-bit varying slots to the original 32-bit varying slots. - * This only changes IO semantics and bases. - */ -bool -nir_unpack_16bit_varying_slots(nir_shader *nir, nir_variable_mode modes) -{ - bool changed = false; - nir_function_impl *impl = nir_shader_get_entrypoint(nir); - assert(impl); - - nir_foreach_block_safe(block, impl) { - nir_foreach_instr_safe(instr, block) { - nir_variable_mode mode; - nir_intrinsic_instr *intr = get_io_intrinsic(instr, modes, &mode); - if (!intr) - continue; - - nir_io_semantics sem = nir_intrinsic_io_semantics(intr); - - if (sem.location < VARYING_SLOT_VAR0_16BIT || - sem.location > VARYING_SLOT_VAR15_16BIT) - continue; - - sem.location = VARYING_SLOT_VAR0 + - (sem.location - VARYING_SLOT_VAR0_16BIT) * 2 + - sem.high_16bits; - sem.high_16bits = 0; - nir_intrinsic_set_io_semantics(intr, sem); - changed = true; - } - } - - if (changed) - nir_recompute_io_bases(nir, modes); - - return nir_progress(changed, impl, nir_metadata_control_flow); -} - static bool is_mediump_or_lowp(unsigned precision) {