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winsys/amdgpu: move legacy chunk init and submission to new function
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29010>
This commit is contained in:
Yogesh Mohan Marimuthu
Marge Bot
parent
afeb500498
commit
97664d9e84
1 changed files with 122 additions and 96 deletions
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@ -1252,6 +1252,127 @@ static void amdgpu_cs_add_syncobj_signal(struct radeon_cmdbuf *rws,
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add_fence_to_list(&cs->syncobj_to_signal, (struct amdgpu_fence*)fence);
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}
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static int amdgpu_cs_submit_ib_kernelq(struct amdgpu_cs *acs,
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unsigned num_real_buffers,
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struct drm_amdgpu_bo_list_entry *bo_list_real,
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uint64_t *seq_no)
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{
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struct amdgpu_winsys *aws = acs->aws;
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struct amdgpu_cs_context *cs = acs->cst;
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struct drm_amdgpu_bo_list_in bo_list_in;
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struct drm_amdgpu_cs_chunk chunks[8];
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unsigned num_chunks = 0;
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/* BO list */
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bo_list_in.operation = ~0;
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bo_list_in.list_handle = ~0;
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bo_list_in.bo_number = num_real_buffers;
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bo_list_in.bo_info_size = sizeof(struct drm_amdgpu_bo_list_entry);
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bo_list_in.bo_info_ptr = (uint64_t)(uintptr_t)bo_list_real;
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chunks[num_chunks].chunk_id = AMDGPU_CHUNK_ID_BO_HANDLES;
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chunks[num_chunks].length_dw = sizeof(struct drm_amdgpu_bo_list_in) / 4;
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chunks[num_chunks].chunk_data = (uintptr_t)&bo_list_in;
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num_chunks++;
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/* Syncobj dependencies. */
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unsigned num_syncobj_dependencies = cs->syncobj_dependencies.num;
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if (num_syncobj_dependencies) {
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struct drm_amdgpu_cs_chunk_sem *sem_chunk =
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(struct drm_amdgpu_cs_chunk_sem *)
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alloca(num_syncobj_dependencies * sizeof(sem_chunk[0]));
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for (unsigned i = 0; i < num_syncobj_dependencies; i++) {
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struct amdgpu_fence *fence =
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(struct amdgpu_fence*)cs->syncobj_dependencies.list[i];
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assert(util_queue_fence_is_signalled(&fence->submitted));
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sem_chunk[i].handle = fence->syncobj;
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}
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chunks[num_chunks].chunk_id = AMDGPU_CHUNK_ID_SYNCOBJ_IN;
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chunks[num_chunks].length_dw = sizeof(sem_chunk[0]) / 4 * num_syncobj_dependencies;
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chunks[num_chunks].chunk_data = (uintptr_t)sem_chunk;
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num_chunks++;
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}
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/* Syncobj signals. */
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unsigned num_syncobj_to_signal = 1 + cs->syncobj_to_signal.num;
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struct drm_amdgpu_cs_chunk_sem *sem_chunk =
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(struct drm_amdgpu_cs_chunk_sem *)
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alloca(num_syncobj_to_signal * sizeof(sem_chunk[0]));
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for (unsigned i = 0; i < num_syncobj_to_signal - 1; i++) {
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struct amdgpu_fence *fence =
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(struct amdgpu_fence*)cs->syncobj_to_signal.list[i];
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sem_chunk[i].handle = fence->syncobj;
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}
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sem_chunk[cs->syncobj_to_signal.num].handle = ((struct amdgpu_fence*)cs->fence)->syncobj;
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chunks[num_chunks].chunk_id = AMDGPU_CHUNK_ID_SYNCOBJ_OUT;
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chunks[num_chunks].length_dw = sizeof(sem_chunk[0]) / 4 * num_syncobj_to_signal;
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chunks[num_chunks].chunk_data = (uintptr_t)sem_chunk;
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num_chunks++;
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if (aws->info.has_fw_based_shadowing && acs->mcbp_fw_shadow_chunk.shadow_va) {
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chunks[num_chunks].chunk_id = AMDGPU_CHUNK_ID_CP_GFX_SHADOW;
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chunks[num_chunks].length_dw = sizeof(struct drm_amdgpu_cs_chunk_cp_gfx_shadow) / 4;
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chunks[num_chunks].chunk_data = (uintptr_t)&acs->mcbp_fw_shadow_chunk;
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num_chunks++;
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}
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/* Fence */
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if (amdgpu_cs_has_user_fence(acs)) {
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chunks[num_chunks].chunk_id = AMDGPU_CHUNK_ID_FENCE;
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chunks[num_chunks].length_dw = sizeof(struct drm_amdgpu_cs_chunk_fence) / 4;
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chunks[num_chunks].chunk_data = (uintptr_t)&acs->fence_chunk;
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num_chunks++;
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}
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/* IB */
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if (cs->chunk_ib[IB_PREAMBLE].ib_bytes) {
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chunks[num_chunks].chunk_id = AMDGPU_CHUNK_ID_IB;
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chunks[num_chunks].length_dw = sizeof(struct drm_amdgpu_cs_chunk_ib) / 4;
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chunks[num_chunks].chunk_data = (uintptr_t)&cs->chunk_ib[IB_PREAMBLE];
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num_chunks++;
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}
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/* IB */
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chunks[num_chunks].chunk_id = AMDGPU_CHUNK_ID_IB;
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chunks[num_chunks].length_dw = sizeof(struct drm_amdgpu_cs_chunk_ib) / 4;
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chunks[num_chunks].chunk_data = (uintptr_t)&cs->chunk_ib[IB_MAIN];
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num_chunks++;
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if (cs->secure) {
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cs->chunk_ib[IB_PREAMBLE].flags |= AMDGPU_IB_FLAGS_SECURE;
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cs->chunk_ib[IB_MAIN].flags |= AMDGPU_IB_FLAGS_SECURE;
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} else {
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cs->chunk_ib[IB_PREAMBLE].flags &= ~AMDGPU_IB_FLAGS_SECURE;
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cs->chunk_ib[IB_MAIN].flags &= ~AMDGPU_IB_FLAGS_SECURE;
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}
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assert(num_chunks <= 8);
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/* Submit the command buffer.
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*
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* The kernel returns -ENOMEM with many parallel processes using GDS such as test suites
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* quite often, but it eventually succeeds after enough attempts. This happens frequently
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* with dEQP using NGG streamout.
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*/
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int r = 0;
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do {
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/* Wait 1 ms and try again. */
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if (r == -ENOMEM)
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os_time_sleep(1000);
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r = ac_drm_cs_submit_raw2(aws->fd, acs->ctx->ctx_handle, 0, num_chunks, chunks, seq_no);
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} while (r == -ENOMEM);
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return r;
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}
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/* The template parameter determines whether the queue should skip code used by the default queue
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* system that's based on sequence numbers, and instead use and update amdgpu_winsys_bo::alt_fence
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* for all BOs.
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@ -1524,101 +1645,6 @@ static void amdgpu_cs_submit_ib(void *job, void *gdata, int thread_index)
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if (acs->ip_type == AMD_IP_GFX)
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aws->gfx_bo_list_counter += num_real_buffers;
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struct drm_amdgpu_cs_chunk chunks[8];
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unsigned num_chunks = 0;
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/* BO list */
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struct drm_amdgpu_bo_list_in bo_list_in;
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bo_list_in.operation = ~0;
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bo_list_in.list_handle = ~0;
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bo_list_in.bo_number = num_real_buffers;
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bo_list_in.bo_info_size = sizeof(struct drm_amdgpu_bo_list_entry);
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bo_list_in.bo_info_ptr = (uint64_t)(uintptr_t)bo_list;
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chunks[num_chunks].chunk_id = AMDGPU_CHUNK_ID_BO_HANDLES;
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chunks[num_chunks].length_dw = sizeof(struct drm_amdgpu_bo_list_in) / 4;
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chunks[num_chunks].chunk_data = (uintptr_t)&bo_list_in;
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num_chunks++;
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/* Syncobj dependencies. */
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unsigned num_syncobj_dependencies = cs->syncobj_dependencies.num;
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if (num_syncobj_dependencies) {
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struct drm_amdgpu_cs_chunk_sem *sem_chunk =
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(struct drm_amdgpu_cs_chunk_sem *)
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alloca(num_syncobj_dependencies * sizeof(sem_chunk[0]));
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for (unsigned i = 0; i < num_syncobj_dependencies; i++) {
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struct amdgpu_fence *fence =
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(struct amdgpu_fence*)cs->syncobj_dependencies.list[i];
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assert(util_queue_fence_is_signalled(&fence->submitted));
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sem_chunk[i].handle = fence->syncobj;
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}
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chunks[num_chunks].chunk_id = AMDGPU_CHUNK_ID_SYNCOBJ_IN;
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chunks[num_chunks].length_dw = sizeof(sem_chunk[0]) / 4 * num_syncobj_dependencies;
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chunks[num_chunks].chunk_data = (uintptr_t)sem_chunk;
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num_chunks++;
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}
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/* Syncobj signals. */
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unsigned num_syncobj_to_signal = 1 + cs->syncobj_to_signal.num;
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struct drm_amdgpu_cs_chunk_sem *sem_chunk =
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(struct drm_amdgpu_cs_chunk_sem *)
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alloca(num_syncobj_to_signal * sizeof(sem_chunk[0]));
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for (unsigned i = 0; i < num_syncobj_to_signal - 1; i++) {
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struct amdgpu_fence *fence =
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(struct amdgpu_fence*)cs->syncobj_to_signal.list[i];
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sem_chunk[i].handle = fence->syncobj;
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}
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sem_chunk[cs->syncobj_to_signal.num].handle = ((struct amdgpu_fence*)cs->fence)->syncobj;
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chunks[num_chunks].chunk_id = AMDGPU_CHUNK_ID_SYNCOBJ_OUT;
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chunks[num_chunks].length_dw = sizeof(sem_chunk[0]) / 4 * num_syncobj_to_signal;
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chunks[num_chunks].chunk_data = (uintptr_t)sem_chunk;
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num_chunks++;
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if (aws->info.has_fw_based_shadowing && acs->mcbp_fw_shadow_chunk.shadow_va) {
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chunks[num_chunks].chunk_id = AMDGPU_CHUNK_ID_CP_GFX_SHADOW;
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chunks[num_chunks].length_dw = sizeof(struct drm_amdgpu_cs_chunk_cp_gfx_shadow) / 4;
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chunks[num_chunks].chunk_data = (uintptr_t)&acs->mcbp_fw_shadow_chunk;
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num_chunks++;
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}
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/* Fence */
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if (has_user_fence) {
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chunks[num_chunks].chunk_id = AMDGPU_CHUNK_ID_FENCE;
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chunks[num_chunks].length_dw = sizeof(struct drm_amdgpu_cs_chunk_fence) / 4;
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chunks[num_chunks].chunk_data = (uintptr_t)&acs->fence_chunk;
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num_chunks++;
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}
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/* IB */
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if (cs->chunk_ib[IB_PREAMBLE].ib_bytes) {
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chunks[num_chunks].chunk_id = AMDGPU_CHUNK_ID_IB;
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chunks[num_chunks].length_dw = sizeof(struct drm_amdgpu_cs_chunk_ib) / 4;
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chunks[num_chunks].chunk_data = (uintptr_t)&cs->chunk_ib[IB_PREAMBLE];
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num_chunks++;
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}
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/* IB */
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chunks[num_chunks].chunk_id = AMDGPU_CHUNK_ID_IB;
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chunks[num_chunks].length_dw = sizeof(struct drm_amdgpu_cs_chunk_ib) / 4;
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chunks[num_chunks].chunk_data = (uintptr_t)&cs->chunk_ib[IB_MAIN];
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num_chunks++;
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if (cs->secure) {
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cs->chunk_ib[IB_PREAMBLE].flags |= AMDGPU_IB_FLAGS_SECURE;
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cs->chunk_ib[IB_MAIN].flags |= AMDGPU_IB_FLAGS_SECURE;
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} else {
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cs->chunk_ib[IB_PREAMBLE].flags &= ~AMDGPU_IB_FLAGS_SECURE;
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cs->chunk_ib[IB_MAIN].flags &= ~AMDGPU_IB_FLAGS_SECURE;
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}
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assert(num_chunks <= ARRAY_SIZE(chunks));
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if (out_of_memory) {
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r = -ENOMEM;
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} else if (unlikely(acs->ctx->sw_status != PIPE_NO_RESET)) {
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@ -1639,7 +1665,7 @@ static void amdgpu_cs_submit_ib(void *job, void *gdata, int thread_index)
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if (r == -ENOMEM)
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os_time_sleep(1000);
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r = ac_drm_cs_submit_raw2(aws->fd, acs->ctx->ctx_handle, 0, num_chunks, chunks, &seq_no);
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r = amdgpu_cs_submit_ib_kernelq(acs, num_real_buffers, bo_list, &seq_no);
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} while (r == -ENOMEM);
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if (!r) {
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