diff --git a/.pick_status.json b/.pick_status.json
index e7b4f576c86..75cf976d2c0 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -706,7 +706,7 @@
         "description": "hasvk: fix null descriptor handling with A64 messages",
         "nominated": true,
         "nomination_type": 0,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": null
     },
diff --git a/src/intel/vulkan_hasvk/anv_device.c b/src/intel/vulkan_hasvk/anv_device.c
index de25b703f69..9f1e65a1723 100644
--- a/src/intel/vulkan_hasvk/anv_device.c
+++ b/src/intel/vulkan_hasvk/anv_device.c
@@ -2977,6 +2977,10 @@ VkResult anv_CreateDevice(
       goto fail_default_pipeline_cache;
    }
 
+   device->robust_buffer_access =
+      device->vk.enabled_features.robustBufferAccess ||
+      device->vk.enabled_features.nullDescriptor;
+
    anv_device_init_blorp(device);
 
    anv_device_init_border_colors(device);
diff --git a/src/intel/vulkan_hasvk/anv_pipeline.c b/src/intel/vulkan_hasvk/anv_pipeline.c
index 306fcd9d82e..9fdff281ff4 100644
--- a/src/intel/vulkan_hasvk/anv_pipeline.c
+++ b/src/intel/vulkan_hasvk/anv_pipeline.c
@@ -115,9 +115,9 @@ anv_shader_stage_to_nir(struct anv_device *device,
          .workgroup_memory_explicit_layout = true,
       },
       .ubo_addr_format =
-         anv_nir_ubo_addr_format(pdevice, device->vk.enabled_features.robustBufferAccess),
+         anv_nir_ubo_addr_format(pdevice, device->robust_buffer_access),
       .ssbo_addr_format =
-          anv_nir_ssbo_addr_format(pdevice, device->vk.enabled_features.robustBufferAccess),
+          anv_nir_ssbo_addr_format(pdevice, device->robust_buffer_access),
       .phys_ssbo_addr_format = nir_address_format_64bit_global,
       .push_const_addr_format = nir_address_format_logical,
 
@@ -575,15 +575,15 @@ anv_pipeline_lower_nir(struct anv_pipeline *pipeline,
 
    /* Apply the actual pipeline layout to UBOs, SSBOs, and textures */
    NIR_PASS_V(nir, anv_nir_apply_pipeline_layout,
-              pdevice, pipeline->device->vk.enabled_features.robustBufferAccess,
+              pdevice, pipeline->device->robust_buffer_access,
               layout, &stage->bind_map);
 
    NIR_PASS(_, nir, nir_lower_explicit_io, nir_var_mem_ubo,
             anv_nir_ubo_addr_format(pdevice,
-               pipeline->device->vk.enabled_features.robustBufferAccess));
+               pipeline->device->robust_buffer_access));
    NIR_PASS(_, nir, nir_lower_explicit_io, nir_var_mem_ssbo,
             anv_nir_ssbo_addr_format(pdevice,
-               pipeline->device->vk.enabled_features.robustBufferAccess));
+               pipeline->device->robust_buffer_access));
 
    /* First run copy-prop to get rid of all of the vec() that address
     * calculations often create and then constant-fold so that, when we
@@ -616,7 +616,7 @@ anv_pipeline_lower_nir(struct anv_pipeline *pipeline,
    }
 
    NIR_PASS_V(nir, anv_nir_compute_push_layout,
-              pdevice, pipeline->device->vk.enabled_features.robustBufferAccess,
+              pdevice, pipeline->device->robust_buffer_access,
               prog_data, &stage->bind_map, mem_ctx);
 
    if (gl_shader_stage_uses_workgroup(nir->info.stage)) {
@@ -1095,28 +1095,28 @@ anv_graphics_pipeline_init_keys(struct anv_graphics_pipeline *pipeline,
       switch (stages[s].stage) {
       case MESA_SHADER_VERTEX:
          populate_vs_prog_key(device,
-                              pipeline->base.device->vk.enabled_features.robustBufferAccess,
+                              pipeline->base.device->robust_buffer_access,
                               &stages[s].key.vs);
          break;
       case MESA_SHADER_TESS_CTRL:
          populate_tcs_prog_key(device,
-                               pipeline->base.device->vk.enabled_features.robustBufferAccess,
+                               pipeline->base.device->robust_buffer_access,
                                state->ts->patch_control_points,
                                &stages[s].key.tcs);
          break;
       case MESA_SHADER_TESS_EVAL:
          populate_tes_prog_key(device,
-                               pipeline->base.device->vk.enabled_features.robustBufferAccess,
+                               pipeline->base.device->robust_buffer_access,
                                &stages[s].key.tes);
          break;
       case MESA_SHADER_GEOMETRY:
          populate_gs_prog_key(device,
-                              pipeline->base.device->vk.enabled_features.robustBufferAccess,
+                              pipeline->base.device->robust_buffer_access,
                               &stages[s].key.gs);
          break;
       case MESA_SHADER_FRAGMENT: {
          populate_wm_prog_key(pipeline,
-                              pipeline->base.device->vk.enabled_features.robustBufferAccess,
+                              pipeline->base.device->robust_buffer_access,
                               state->dynamic, state->ms, state->rp,
                               &stages[s].key.wm);
          break;
@@ -1495,7 +1495,7 @@ anv_pipeline_compile_cs(struct anv_compute_pipeline *pipeline,
 
    struct anv_shader_bin *bin = NULL;
 
-   populate_cs_prog_key(device, device->vk.enabled_features.robustBufferAccess, &stage.key.cs);
+   populate_cs_prog_key(device, device->robust_buffer_access, &stage.key.cs);
 
    ANV_FROM_HANDLE(anv_pipeline_layout, layout, info->layout);
 
diff --git a/src/intel/vulkan_hasvk/anv_private.h b/src/intel/vulkan_hasvk/anv_private.h
index d5a8e440530..5d9e85eeebe 100644
--- a/src/intel/vulkan_hasvk/anv_private.h
+++ b/src/intel/vulkan_hasvk/anv_private.h
@@ -1076,6 +1076,8 @@ struct anv_device {
 
     struct anv_scratch_pool                     scratch_pool;
 
+    bool                                        robust_buffer_access;
+
     pthread_mutex_t                             mutex;
     pthread_cond_t                              queue_submit;