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intel/fs: Add builder helpers for F32TO16/F16TO32 that work on Gfx7.x

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These take care of emitting the F32TO16/F16TO32 instructions on Gfx7.x
but otherwise just emit a type converting MOV on Gfx8+.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21783>
This commit is contained in:
Kenneth Graunke 2023-03-07 20:40:11 -08:00 • committed by Marge Bot
parent 3864049184
commit 966995d911
1 changed files with 30 additions and 2 deletions
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32
src/intel/compiler/brw_fs_builder.h
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@ -627,8 +627,6 @@ namespace brw {
ALU2(DP3) ALU2(DP3)
ALU2(DP4) ALU2(DP4)
ALU2(DPH) ALU2(DPH)
ALU1(F16TO32)
ALU1(F32TO16)
ALU1(FBH) ALU1(FBH)
ALU1(FBL) ALU1(FBL)
ALU1(FRC) ALU1(FRC)
@ -661,6 +659,36 @@ namespace brw {
#undef ALU2_ACC #undef ALU2_ACC
#undef ALU2 #undef ALU2
#undef ALU1 #undef ALU1
instruction *
F32TO16(const dst_reg &dst, const src_reg &src) const
{
assert(dst.type == BRW_REGISTER_TYPE_HF);
assert(src.type == BRW_REGISTER_TYPE_F);
if (shader->devinfo->ver >= 8) {
return MOV(dst, src);
} else {
assert(shader->devinfo->ver == 7);
return emit(BRW_OPCODE_F32TO16,
retype(dst, BRW_REGISTER_TYPE_W), src);
}
}
instruction *
F16TO32(const dst_reg &dst, const src_reg &src) const
{
assert(dst.type == BRW_REGISTER_TYPE_F);
assert(src.type == BRW_REGISTER_TYPE_HF);
if (shader->devinfo->ver >= 8) {
return MOV(dst, src);
} else {
assert(shader->devinfo->ver == 7);
return emit(BRW_OPCODE_F32TO16,
dst, retype(src, BRW_REGISTER_TYPE_W));
}
}
/** @} */ /** @} */
/** /**