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i965: SF: Change gen{6,7}_sf_state.c to compute URB read length based on VUE map.

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Reviewed-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Paul Berry 2011-08-31 09:31:00 -07:00
parent fc60a07d88
commit 9660e3b788
2 changed files with 24 additions and 8 deletions
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16
src/mesa/drivers/dri/i965/gen6_sf_state.c
View file

@ -104,9 +104,9 @@ upload_sf_state(struct brw_context *brw)
struct intel_context *intel = &brw->intel;
struct gl_context *ctx = &intel->ctx;
struct brw_vue_map vue_map;
uint32_t urb_entry_read_length;
/* CACHE_NEW_VS_PROG */
GLbitfield64 vs_outputs_written = brw->vs.prog_data->outputs_written;
uint32_t num_inputs = brw_count_bits(vs_outputs_written);
/* BRW_NEW_FRAGMENT_PROGRAM */
uint32_t num_outputs = brw_count_bits(brw->fragment_program->Base.InputsRead);
uint32_t dw1, dw2, dw3, dw4, dw16, dw17;
@ -127,10 +127,20 @@ upload_sf_state(struct brw_context *brw)
urb_entry_read_offset = 1;
nr_userclip = brw_count_bits(ctx->Transform.ClipPlanesEnabled);
brw_compute_vue_map(&vue_map, intel, nr_userclip, two_side_color,
vs_outputs_written);
urb_entry_read_length = (vue_map.num_slots + 1)/2 - urb_entry_read_offset;
if (urb_entry_read_length == 0) {
/* Setting the URB entry read length to 0 causes undefined behavior, so
* if we have no URB data to read, set it to 1.
*/
urb_entry_read_length = 1;
}
dw1 =
GEN6_SF_SWIZZLE_ENABLE |
num_outputs << GEN6_SF_NUM_OUTPUTS_SHIFT |
(num_inputs + 1) / 2 << GEN6_SF_URB_ENTRY_READ_LENGTH_SHIFT |
urb_entry_read_length << GEN6_SF_URB_ENTRY_READ_LENGTH_SHIFT |
urb_entry_read_offset << GEN6_SF_URB_ENTRY_READ_OFFSET_SHIFT;
dw2 = GEN6_SF_VIEWPORT_TRANSFORM_ENABLE |
GEN6_SF_STATISTICS_ENABLE;
@ -255,8 +265,6 @@ upload_sf_state(struct brw_context *brw)
/* Create the mapping from the FS inputs we produce to the VS outputs
* they source from.
*/
brw_compute_vue_map(&vue_map, intel, nr_userclip, two_side_color,
vs_outputs_written);
for (; attr < FRAG_ATTRIB_MAX; attr++) {
if (!(brw->fragment_program->Base.InputsRead & BITFIELD64_BIT(attr)))
continue;

16
src/mesa/drivers/dri/i965/gen7_sf_state.c
View file

@ -34,9 +34,9 @@ upload_sbe_state(struct brw_context *brw)
struct intel_context *intel = &brw->intel;
struct gl_context *ctx = &intel->ctx;
struct brw_vue_map vue_map;
uint32_t urb_entry_read_length;
/* CACHE_NEW_VS_PROG */
GLbitfield64 vs_outputs_written = brw->vs.prog_data->outputs_written;
uint32_t num_inputs = brw_count_bits(vs_outputs_written);
/* BRW_NEW_FRAGMENT_PROGRAM */
uint32_t num_outputs = brw_count_bits(brw->fragment_program->Base.InputsRead);
uint32_t dw1, dw10, dw11;
@ -50,11 +50,21 @@ upload_sbe_state(struct brw_context *brw)
int two_side_color = (ctx->Light.Enabled && ctx->Light.Model.TwoSide);
uint16_t attr_overrides[FRAG_ATTRIB_MAX];
brw_compute_vue_map(&vue_map, intel, nr_userclip, two_side_color,
vs_outputs_written);
urb_entry_read_length = (vue_map.num_slots + 1)/2 - urb_entry_read_offset;
if (urb_entry_read_length == 0) {
/* Setting the URB entry read length to 0 causes undefined behavior, so
* if we have no URB data to read, set it to 1.
*/
urb_entry_read_length = 1;
}
/* FINISHME: Attribute Swizzle Control Mode? */
dw1 =
GEN7_SBE_SWIZZLE_ENABLE |
num_outputs << GEN7_SBE_NUM_OUTPUTS_SHIFT |
(num_inputs + 1) / 2 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT |
urb_entry_read_length << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT |
urb_entry_read_offset << GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT;
/* _NEW_POINT */
@ -73,8 +83,6 @@ upload_sbe_state(struct brw_context *brw)
/* Create the mapping from the FS inputs we produce to the VS outputs
* they source from.
*/
brw_compute_vue_map(&vue_map, intel, nr_userclip, two_side_color,
vs_outputs_written);
for (; attr < FRAG_ATTRIB_MAX; attr++) {
if (!(brw->fragment_program->Base.InputsRead & BITFIELD64_BIT(attr)))
continue;