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iris: factor out index buffer emission
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26797>
This commit is contained in:
Lionel Landwerlin
Marge Bot
parent
1caf42d92e
commit
96439b7dfb
1 changed files with 66 additions and 97 deletions
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@ -8165,6 +8165,68 @@ genX(urb_workaround)(struct iris_batch *batch,
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sizeof(struct intel_urb_config));
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}
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static void
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iris_emit_index_buffer(struct iris_context *ice,
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struct iris_batch *batch,
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const struct pipe_draw_info *draw,
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const struct pipe_draw_start_count_bias *sc)
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{
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unsigned offset;
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if (draw->has_user_indices) {
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unsigned start_offset = draw->index_size * sc->start;
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u_upload_data(ice->ctx.const_uploader, start_offset,
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sc->count * draw->index_size, 4,
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(char*)draw->index.user + start_offset,
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&offset, &ice->state.last_res.index_buffer);
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offset -= start_offset;
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} else {
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struct iris_resource *res = (void *) draw->index.resource;
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res->bind_history |= PIPE_BIND_INDEX_BUFFER;
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pipe_resource_reference(&ice->state.last_res.index_buffer,
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draw->index.resource);
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offset = 0;
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iris_emit_buffer_barrier_for(batch, res->bo, IRIS_DOMAIN_VF_READ);
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}
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struct iris_genx_state *genx = ice->state.genx;
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struct iris_bo *bo = iris_resource_bo(ice->state.last_res.index_buffer);
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uint32_t ib_packet[GENX(3DSTATE_INDEX_BUFFER_length)];
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iris_pack_command(GENX(3DSTATE_INDEX_BUFFER), ib_packet, ib) {
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ib.IndexFormat = draw->index_size >> 1;
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ib.MOCS = iris_mocs(bo, &batch->screen->isl_dev,
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ISL_SURF_USAGE_INDEX_BUFFER_BIT);
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ib.BufferSize = bo->size - offset;
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ib.BufferStartingAddress = ro_bo(NULL, bo->address + offset);
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#if GFX_VER >= 12
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ib.L3BypassDisable = true;
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#endif
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}
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if (memcmp(genx->last_index_buffer, ib_packet, sizeof(ib_packet)) != 0) {
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memcpy(genx->last_index_buffer, ib_packet, sizeof(ib_packet));
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iris_batch_emit(batch, ib_packet, sizeof(ib_packet));
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iris_use_pinned_bo(batch, bo, false, IRIS_DOMAIN_VF_READ);
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}
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#if GFX_VER < 11
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/* The VF cache key only uses 32-bits, see vertex buffer comment above */
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uint16_t high_bits = bo->address >> 32ull;
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if (high_bits != ice->state.last_index_bo_high_bits) {
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iris_emit_pipe_control_flush(batch,
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"workaround: VF cache 32-bit key [IB]",
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PIPE_CONTROL_VF_CACHE_INVALIDATE |
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PIPE_CONTROL_CS_STALL);
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ice->state.last_index_bo_high_bits = high_bits;
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}
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#endif
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}
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static void
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iris_upload_render_state(struct iris_context *ice,
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struct iris_batch *batch,
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@ -8223,61 +8285,8 @@ iris_upload_render_state(struct iris_context *ice,
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iris_upload_dirty_render_state(ice, batch, draw);
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if (draw->index_size > 0) {
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unsigned offset;
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if (draw->has_user_indices) {
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unsigned start_offset = draw->index_size * sc->start;
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u_upload_data(ice->ctx.const_uploader, start_offset,
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sc->count * draw->index_size, 4,
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(char*)draw->index.user + start_offset,
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&offset, &ice->state.last_res.index_buffer);
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offset -= start_offset;
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} else {
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struct iris_resource *res = (void *) draw->index.resource;
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res->bind_history |= PIPE_BIND_INDEX_BUFFER;
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pipe_resource_reference(&ice->state.last_res.index_buffer,
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draw->index.resource);
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offset = 0;
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iris_emit_buffer_barrier_for(batch, res->bo, IRIS_DOMAIN_VF_READ);
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}
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struct iris_genx_state *genx = ice->state.genx;
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struct iris_bo *bo = iris_resource_bo(ice->state.last_res.index_buffer);
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uint32_t ib_packet[GENX(3DSTATE_INDEX_BUFFER_length)];
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iris_pack_command(GENX(3DSTATE_INDEX_BUFFER), ib_packet, ib) {
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ib.IndexFormat = draw->index_size >> 1;
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ib.MOCS = iris_mocs(bo, &batch->screen->isl_dev,
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ISL_SURF_USAGE_INDEX_BUFFER_BIT);
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ib.BufferSize = bo->size - offset;
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ib.BufferStartingAddress = ro_bo(NULL, bo->address + offset);
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#if GFX_VER >= 12
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ib.L3BypassDisable = true;
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#endif
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}
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if (memcmp(genx->last_index_buffer, ib_packet, sizeof(ib_packet)) != 0) {
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memcpy(genx->last_index_buffer, ib_packet, sizeof(ib_packet));
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iris_batch_emit(batch, ib_packet, sizeof(ib_packet));
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iris_use_pinned_bo(batch, bo, false, IRIS_DOMAIN_VF_READ);
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}
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#if GFX_VER < 11
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/* The VF cache key only uses 32-bits, see vertex buffer comment above */
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uint16_t high_bits = bo->address >> 32ull;
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if (high_bits != ice->state.last_index_bo_high_bits) {
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iris_emit_pipe_control_flush(batch,
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"workaround: VF cache 32-bit key [IB]",
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PIPE_CONTROL_VF_CACHE_INVALIDATE |
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PIPE_CONTROL_CS_STALL);
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ice->state.last_index_bo_high_bits = high_bits;
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}
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#endif
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}
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if (draw->index_size > 0)
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iris_emit_index_buffer(ice, batch, draw, sc);
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if (indirect) {
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struct mi_builder b;
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@ -8482,48 +8491,8 @@ iris_upload_indirect_render_state(struct iris_context *ice,
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iris_upload_dirty_render_state(ice, batch, draw);
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if (draw->index_size > 0) {
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unsigned offset;
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if (draw->has_user_indices) {
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unsigned start_offset = draw->index_size * sc->start;
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u_upload_data(ice->ctx.const_uploader, start_offset,
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sc->count * draw->index_size, 4,
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(char*)draw->index.user + start_offset,
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&offset, &ice->state.last_res.index_buffer);
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offset -= start_offset;
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} else {
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struct iris_resource *res = (void *) draw->index.resource;
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res->bind_history |= PIPE_BIND_INDEX_BUFFER;
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pipe_resource_reference(&ice->state.last_res.index_buffer,
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draw->index.resource);
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offset = 0;
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iris_emit_buffer_barrier_for(batch, res->bo, IRIS_DOMAIN_VF_READ);
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}
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struct iris_genx_state *genx = ice->state.genx;
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struct iris_bo *bo = iris_resource_bo(ice->state.last_res.index_buffer);
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uint32_t ib_packet[GENX(3DSTATE_INDEX_BUFFER_length)];
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iris_pack_command(GENX(3DSTATE_INDEX_BUFFER), ib_packet, ib) {
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ib.IndexFormat = draw->index_size >> 1;
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ib.MOCS = iris_mocs(bo, &batch->screen->isl_dev,
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ISL_SURF_USAGE_INDEX_BUFFER_BIT);
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ib.BufferSize = bo->size - offset;
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ib.BufferStartingAddress = ro_bo(NULL, bo->address + offset);
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ib.L3BypassDisable = true;
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}
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if (memcmp(genx->last_index_buffer, ib_packet, sizeof(ib_packet)) != 0) {
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memcpy(genx->last_index_buffer, ib_packet, sizeof(ib_packet));
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iris_batch_emit(batch, ib_packet, sizeof(ib_packet));
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iris_use_pinned_bo(batch, bo, false, IRIS_DOMAIN_VF_READ);
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}
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}
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if (draw->index_size > 0)
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iris_emit_index_buffer(ice, batch, draw, sc);
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iris_measure_snapshot(ice, batch, INTEL_SNAPSHOT_DRAW, draw, indirect, sc);
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