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pan/bi: Clarify requirement for barriers
Barriers need to wait on all outstanding messages. This is more of an API requirement than a hardware requirement, but it's still an invariant the scoreboarding pass must respect. Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14298>
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@ -38,7 +38,7 @@
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* 3. The shader must wait on slot #6 before running BLEND, ATEST
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* 4. The shader must wait on slot #7 before running BLEND, ST_TILE
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* 5. ATEST, ZS_EMIT must be issued with slot #0
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* 6. BARRIER must be issued with slot #7
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* 6. BARRIER must be issued with slot #7 and wait on every active slot.
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* 7. Only slots #0 through #5 may be used for clauses not otherwise specified.
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* 8. If a clause writes to a read staging register of an unresolved
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* dependency, it must set a staging barrier.
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