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pan/bi,va: Use dedicated LD_VAR_BUF_FLAT* opcodes on v14+
On v14+, flat source formats are no longer supported by LD_VAR_BUF and LD_VAR_BUF_IMM opcodes. This patch makes the compiler emit the dedicated LD_VAR_BUF_FLAT* opcodes instead. Add the ISA definitions, handle the new opcodes, and add packing tests for both immediate and indirect forms. Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
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6dedfd66a4
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95596dbc0c
5 changed files with 80 additions and 5 deletions
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@ -703,8 +703,10 @@ bi_emit_load_var_buf(bi_builder *b, nir_intrinsic_instr *intr)
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assert(intr->intrinsic == nir_intrinsic_load_var_buf_pan ||
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intr->intrinsic == nir_intrinsic_load_var_buf_flat_pan);
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const unsigned arch = b->shader->arch;
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/* These are only available on Valhall+ */
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assert(b->shader->arch >= 9);
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assert(arch >= 9);
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const bool flat = intr->intrinsic == nir_intrinsic_load_var_buf_flat_pan;
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const nir_alu_type src_type = nir_intrinsic_src_type(intr);
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@ -757,19 +759,36 @@ bi_emit_load_var_buf(bi_builder *b, nir_intrinsic_instr *intr)
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bool use_imm_form = false;
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if (nir_src_is_const(intr->src[0])) {
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imm_offset = nir_src_as_uint(intr->src[0]);
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assert(imm_offset < pan_ld_var_buf_off_size(b->shader->arch));
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assert(imm_offset < pan_ld_var_buf_off_size(arch));
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use_imm_form = true;
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}
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/* On v14+, flat source formats are removed from LD_VAR_BUF/LD_VAR_BUF_IMM,
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* so flat buffer varyings must use the dedicated LD_VAR_BUF_FLAT*.
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*/
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if (use_imm_form) {
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bi_ld_var_buf_imm_to(b, sz, dest, src0, regfmt, sample, source_format,
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if (arch >= 14 && flat) {
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bi_ld_var_buf_flat_imm_to(b, dest, regfmt, vecsize, imm_offset);
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} else {
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bi_ld_var_buf_imm_to(b, sz, dest, src0, regfmt, sample, source_format,
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BI_UPDATE_STORE, vecsize, imm_offset);
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}
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} else {
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bi_index offset = bi_src_index(&intr->src[0]);
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bi_ld_var_buf_to(b, sz, dest, src0, offset, regfmt, sample,
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source_format, BI_UPDATE_STORE, vecsize);
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if (arch >= 14 && flat) {
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bi_ld_var_buf_flat_to(b, dest, offset, regfmt, vecsize);
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} else {
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bi_ld_var_buf_to(b, sz, dest, src0, offset, regfmt, sample,
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source_format, BI_UPDATE_STORE, vecsize);
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}
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}
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/* LD_VAR_BUF_FLAT* only support register formats F16 and F32. */
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assert(
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arch < 14 || !flat ||
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(regfmt == BI_REGISTER_FORMAT_F16 || regfmt == BI_REGISTER_FORMAT_F32));
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bi_split_def(b, &intr->def);
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}
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@ -940,6 +940,32 @@
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<imm name="index" start="12" size="4"/> <!-- 0 for pointx, 1 for pointy, 2 for fragw, 3 for fragz -->
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</ins>
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<ins name="LD_VAR_BUF_FLAT_IMM" title="Load immediate flat varying" message="varying" unit="V">
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<opcode>
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<op val="0x40" start="48" mask="0x1FF"/>
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</opcode>
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<desc>Fetches a given flat varying from hardware buffer</desc>
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<slot/>
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<vecsize/>
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<regfmt/>
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<sr write="true"/>
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<sr_count count="format"/>
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<imm name="index" start="8" size="11"/>
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</ins>
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<ins name="LD_VAR_BUF_FLAT" title="Load indirect flat varying" message="varying" unit="V">
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<opcode>
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<op val="0x5F" start="48" mask="0x1FF"/>
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</opcode>
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<desc>Fetches a given flat varying from hardware buffer</desc>
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<slot/>
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<vecsize/>
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<regfmt/>
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<sr write="true"/>
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<sr_count count="format"/>
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<src/>
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</ins>
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<group name="LD_VAR_BUF_IMM" title="Load immediate varying" message="varying" unit="V">
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<desc>Interpolates a given varying from hardware buffer</desc>
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<ins name="LD_VAR_BUF_IMM.f32">
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@ -294,6 +294,30 @@ TEST_F(ValhallPacking, LdVarBufImmF16)
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11, 0x005d80443300083d);
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}
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TEST_F(ValhallPacking, LdVarBufFlatImmFormat)
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{
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CASE_ARCH(bi_ld_var_buf_flat_imm_to(b, bi_register(0),
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BI_REGISTER_FORMAT_F32,
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BI_VECSIZE_V4, 0x12),
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14, 0x0040800832001200);
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CASE_ARCH(bi_ld_var_buf_flat_imm_to(b, bi_register(0),
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BI_REGISTER_FORMAT_F16,
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BI_VECSIZE_V4, 0x12),
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14, 0x0040800433001200);
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}
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TEST_F(ValhallPacking, LdVarBufFlat)
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{
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CASE_ARCH(bi_ld_var_buf_flat_to(b, bi_register(0), bi_register(61),
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BI_REGISTER_FORMAT_F32, BI_VECSIZE_V4),
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14, 0x005f80083200003d);
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CASE_ARCH(bi_ld_var_buf_flat_to(b, bi_register(0), bi_register(61),
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BI_REGISTER_FORMAT_F16, BI_VECSIZE_V4),
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14, 0x005f80043300003d);
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}
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TEST_F(ValhallPacking, LeaBufImm)
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{
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CASE(bi_lea_buf_imm_to(b, bi_register(4), bi_discard(bi_register(59))),
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@ -77,6 +77,8 @@ walk_bir_shader(bi_context *ctx, struct pan_shader_info *info)
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if (instr->sample == BI_SAMPLE_CENTROID)
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info->fs.hsr.centroid_interpolation = true;
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FALLTHROUGH;
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case BI_OPCODE_LD_VAR_BUF_FLAT:
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case BI_OPCODE_LD_VAR_BUF_FLAT_IMM:
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case BI_OPCODE_LD_VAR_FLAT:
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case BI_OPCODE_LD_VAR_FLAT_IMM:
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if (!found_atest)
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@ -566,6 +566,10 @@ va_pack_alu(const bi_instr *I, unsigned arch)
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hex |= ((uint64_t)I->sample) << 38;
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break;
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case BI_OPCODE_LD_VAR_BUF_FLAT_IMM:
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hex |= ((uint64_t)I->index) << 8;
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break;
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case BI_OPCODE_LD_ATTR_IMM:
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hex |= ((uint64_t)I->table) << 16;
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hex |= ((uint64_t)I->attribute_index) << 20;
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