From 9553d67373830e6e77f7c8556523f956aa4b8e32 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Timur=20Krist=C3=B3f?= Date: Thu, 8 Feb 2024 11:56:36 +0100 Subject: [PATCH] nir: Fix divergence analysis of load_patch_vertices_in. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit load_patch_vertices_in can only occur in tessellation shaders, and contains the number of vertices in an input patch. * TCS: patch_vertices_in is equal to the input patch size * TES: patch_vertices_in is equal to the TCS output patch size The patch sizes may be set by a pipeline or dynamic states, however in both cases it is definitely uniform within a subgroup. Signed-off-by: Timur Kristóf Reviewed-by: Daniel Schürmann Part-of: --- src/compiler/nir/nir_divergence_analysis.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/src/compiler/nir/nir_divergence_analysis.c b/src/compiler/nir/nir_divergence_analysis.c index 6db01231475..03aedde23c1 100644 --- a/src/compiler/nir/nir_divergence_analysis.c +++ b/src/compiler/nir/nir_divergence_analysis.c @@ -162,6 +162,7 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr, case nir_intrinsic_load_num_vertices: case nir_intrinsic_load_fb_layers_v3d: case nir_intrinsic_load_tcs_num_patches_amd: + case nir_intrinsic_load_patch_vertices_in: case nir_intrinsic_load_ring_tess_factors_amd: case nir_intrinsic_load_ring_tess_offchip_amd: case nir_intrinsic_load_ring_tess_factors_offset_amd: @@ -350,12 +351,6 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr, else unreachable("Invalid stage for load_primitive_tess_level_*"); break; - case nir_intrinsic_load_patch_vertices_in: - if (stage == MESA_SHADER_TESS_EVAL) - is_divergent = !(options & nir_divergence_single_patch_per_tes_subgroup); - else - assert(stage == MESA_SHADER_TESS_CTRL); - break; case nir_intrinsic_load_workgroup_index: case nir_intrinsic_load_workgroup_id: