diff --git a/src/gallium/auxiliary/gallivm/lp_bld_init.c b/src/gallium/auxiliary/gallivm/lp_bld_init.c
index 9e28256ac53..c1a8a72f13d 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_init.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_init.c
@@ -438,22 +438,6 @@ lp_build_init(void)
 
    lp_set_target_options();
 
-   /* For simulating less capable machines */
-#ifdef DEBUG
-   if (debug_get_bool_option("LP_FORCE_SSE2", FALSE)) {
-      extern struct util_cpu_caps_t util_cpu_caps;
-      assert(util_cpu_caps.has_sse2);
-      util_cpu_caps.has_sse3 = 0;
-      util_cpu_caps.has_ssse3 = 0;
-      util_cpu_caps.has_sse4_1 = 0;
-      util_cpu_caps.has_sse4_2 = 0;
-      util_cpu_caps.has_avx = 0;
-      util_cpu_caps.has_avx2 = 0;
-      util_cpu_caps.has_f16c = 0;
-      util_cpu_caps.has_fma = 0;
-   }
-#endif
-
    if (util_get_cpu_caps()->has_avx2 || util_get_cpu_caps()->has_avx) {
       lp_native_vector_width = 256;
    } else {
diff --git a/src/util/u_cpu_detect.c b/src/util/u_cpu_detect.c
index 1bd78bace1d..e89dc156876 100644
--- a/src/util/u_cpu_detect.c
+++ b/src/util/u_cpu_detect.c
@@ -797,6 +797,12 @@ util_cpu_detect_once(void)
    if (debug_get_bool_option("GALLIUM_NOSSE", false)) {
       util_cpu_caps.has_sse = 0;
    }
+#ifdef DEBUG
+   /* For simulating less capable machines */
+   if (debug_get_bool_option("LP_FORCE_SSE2", false)) {
+      util_cpu_caps.has_sse3 = 0;
+   }
+#endif
 #endif /* PIPE_ARCH_X86 || PIPE_ARCH_X86_64 */
 
 #if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)