From 94f4fc12ea39a7bc422baf6fa1e5b3f3e70ee8ad Mon Sep 17 00:00:00 2001 From: Mel Henning Date: Tue, 8 Jul 2025 16:09:37 -0400 Subject: [PATCH] nir/divergence_analysis: Add NV_shader_sm_builtins Fixes crucible func.nv.shader-sm-builtins.q0 Fixes: a3839dbb90 ("nak: Change divergence analysis pass order") Reviewed-by: Mary Guillemard Part-of: --- src/compiler/nir/nir_divergence_analysis.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/compiler/nir/nir_divergence_analysis.c b/src/compiler/nir/nir_divergence_analysis.c index dc5800e5daa..8feff77159b 100644 --- a/src/compiler/nir/nir_divergence_analysis.c +++ b/src/compiler/nir/nir_divergence_analysis.c @@ -209,6 +209,8 @@ visit_intrinsic(nir_intrinsic_instr *instr, struct divergence_state *state) case nir_intrinsic_load_subgroup_id: case nir_intrinsic_shared_append_amd: case nir_intrinsic_shared_consume_amd: + case nir_intrinsic_load_sm_id_nv: + case nir_intrinsic_load_warp_id_nv: /* VS/TES/GS invocations of the same primitive can be in different * subgroups, so subgroup ops are always divergent between vertices of * the same primitive. @@ -355,6 +357,8 @@ visit_intrinsic(nir_intrinsic_instr *instr, struct divergence_state *state) case nir_intrinsic_load_samples_log2_agx: case nir_intrinsic_load_active_subgroup_count_agx: case nir_intrinsic_load_root_agx: + case nir_intrinsic_load_sm_count_nv: + case nir_intrinsic_load_warps_per_sm_nv: case nir_intrinsic_load_fs_msaa_intel: case nir_intrinsic_load_constant_base_ptr: case nir_intrinsic_load_const_buf_base_addr_lvp: