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nvk: Do not keep redundant info for tessellation domain
This is not needed after merge_tess_info that or's the info of both the tesc and tese shaders. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24326>
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parent
2d670169ce
commit
94e5eb68f4
5 changed files with 4 additions and 23 deletions
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@ -190,9 +190,8 @@ nvk_compute_pipeline_create(struct nvk_device *device,
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nvk_lower_nir(device, nir, &robustness, false, pipeline_layout);
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struct nvk_pipeline_compilation_ctx ctx = { 0 };
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result = nvk_compile_nir(pdevice, nir, NULL,
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&pipeline->base.shaders[MESA_SHADER_COMPUTE], &ctx);
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&pipeline->base.shaders[MESA_SHADER_COMPUTE]);
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ralloc_free(nir);
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if (result != VK_SUCCESS)
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goto fail;
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@ -337,10 +337,6 @@ nvk_graphics_pipeline_create(struct nvk_device *device,
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state.rp->view_mask != 0, pipeline_layout);
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}
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struct nvk_pipeline_compilation_ctx ctx = {
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.tesc_domain = MESA_PRIM_POINTS,
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};
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for (gl_shader_stage stage = 0; stage < MESA_SHADER_STAGES; stage++) {
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if (nir[stage] == NULL)
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continue;
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@ -352,7 +348,7 @@ nvk_graphics_pipeline_create(struct nvk_device *device,
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}
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result = nvk_compile_nir(pdevice, nir[stage], fs_key,
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&pipeline->base.shaders[stage], &ctx);
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&pipeline->base.shaders[stage]);
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ralloc_free(nir[stage]);
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if (result != VK_SUCCESS)
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goto fail;
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@ -65,9 +65,4 @@ nvk_graphics_pipeline_create(struct nvk_device *device,
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const VkAllocationCallbacks *pAllocator,
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VkPipeline *pPipeline);
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struct nvk_pipeline_compilation_ctx {
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uint8_t tesc_domain; // MESA_PRIM_{POINTS, QUADS, TRIANGLES, LINES}
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};
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#endif
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@ -1055,8 +1055,7 @@ nvk_fill_transform_feedback_state(struct nir_shader *nir,
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VkResult
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nvk_compile_nir(struct nvk_physical_device *pdev, nir_shader *nir,
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const struct nvk_fs_key *fs_key,
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struct nvk_shader *shader,
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struct nvk_pipeline_compilation_ctx *ctx)
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struct nvk_shader *shader)
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{
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struct nv50_ir_prog_info *info;
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struct nv50_ir_prog_info_out info_out = {};
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@ -1079,9 +1078,6 @@ nvk_compile_nir(struct nvk_physical_device *pdev, nir_shader *nir,
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info->io.auxCBSlot = 1;
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info->io.uboInfoBase = 0;
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info->io.drawInfoBase = 0;
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if (nir->info.stage == MESA_SHADER_TESS_EVAL) {
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info->prop.tese.prespecified_domain = ctx->tesc_domain;
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}
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if (nir->info.stage == MESA_SHADER_COMPUTE) {
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info->prop.cp.gridInfoBase = 0;
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} else {
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@ -1155,10 +1151,6 @@ nvk_compile_nir(struct nvk_physical_device *pdev, nir_shader *nir,
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}
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}
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if (info->type == PIPE_SHADER_TESS_CTRL) {
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ctx->tesc_domain = info_out.prop.tp.domain;
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}
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return VK_SUCCESS;
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}
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@ -126,8 +126,7 @@ nvk_lower_nir(struct nvk_device *device, nir_shader *nir,
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VkResult
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nvk_compile_nir(struct nvk_physical_device *device, nir_shader *nir,
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const struct nvk_fs_key *fs_key,
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struct nvk_shader *shader,
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struct nvk_pipeline_compilation_ctx *ctx);
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struct nvk_shader *shader);
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VkResult
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nvk_shader_upload(struct nvk_device *dev, struct nvk_shader *shader);
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