fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-23 17:40:11 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

nvk: Do not keep redundant info for tessellation domain

Browse source 
This is not needed after merge_tess_info that or's the info of both the
tesc and tese shaders.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24326>
This commit is contained in:
George Ouzounoudis 2023-07-30 15:29:34 +03:00 • committed by Marge Bot
parent 2d670169ce
commit 94e5eb68f4
5 changed files with 4 additions and 23 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

3
src/nouveau/vulkan/nvk_compute_pipeline.c
View file

@ -190,9 +190,8 @@ nvk_compute_pipeline_create(struct nvk_device *device,
nvk_lower_nir(device, nir, &robustness, false, pipeline_layout); nvk_lower_nir(device, nir, &robustness, false, pipeline_layout);
struct nvk_pipeline_compilation_ctx ctx = { 0 };
result = nvk_compile_nir(pdevice, nir, NULL, result = nvk_compile_nir(pdevice, nir, NULL,
&pipeline->base.shaders[MESA_SHADER_COMPUTE], &ctx); &pipeline->base.shaders[MESA_SHADER_COMPUTE]);
ralloc_free(nir); ralloc_free(nir);
if (result != VK_SUCCESS) if (result != VK_SUCCESS)
goto fail; goto fail;

6
src/nouveau/vulkan/nvk_graphics_pipeline.c
View file

@ -337,10 +337,6 @@ nvk_graphics_pipeline_create(struct nvk_device *device,
state.rp->view_mask != 0, pipeline_layout); state.rp->view_mask != 0, pipeline_layout);
} }
struct nvk_pipeline_compilation_ctx ctx = {
.tesc_domain = MESA_PRIM_POINTS,
};
for (gl_shader_stage stage = 0; stage < MESA_SHADER_STAGES; stage++) { for (gl_shader_stage stage = 0; stage < MESA_SHADER_STAGES; stage++) {
if (nir[stage] == NULL) if (nir[stage] == NULL)
continue; continue;
@ -352,7 +348,7 @@ nvk_graphics_pipeline_create(struct nvk_device *device,
} }
result = nvk_compile_nir(pdevice, nir[stage], fs_key, result = nvk_compile_nir(pdevice, nir[stage], fs_key,
&pipeline->base.shaders[stage], &ctx); &pipeline->base.shaders[stage]);
ralloc_free(nir[stage]); ralloc_free(nir[stage]);
if (result != VK_SUCCESS) if (result != VK_SUCCESS)
goto fail; goto fail;

5
src/nouveau/vulkan/nvk_pipeline.h
View file

@ -65,9 +65,4 @@ nvk_graphics_pipeline_create(struct nvk_device *device,
const VkAllocationCallbacks *pAllocator, const VkAllocationCallbacks *pAllocator,
VkPipeline *pPipeline); VkPipeline *pPipeline);
struct nvk_pipeline_compilation_ctx {
uint8_t tesc_domain; // MESA_PRIM_{POINTS, QUADS, TRIANGLES, LINES}
};
#endif #endif

10
src/nouveau/vulkan/nvk_shader.c
View file

@ -1055,8 +1055,7 @@ nvk_fill_transform_feedback_state(struct nir_shader *nir,
VkResult VkResult
nvk_compile_nir(struct nvk_physical_device *pdev, nir_shader *nir, nvk_compile_nir(struct nvk_physical_device *pdev, nir_shader *nir,
const struct nvk_fs_key *fs_key, const struct nvk_fs_key *fs_key,
struct nvk_shader *shader, struct nvk_shader *shader)
struct nvk_pipeline_compilation_ctx *ctx)
{ {
struct nv50_ir_prog_info *info; struct nv50_ir_prog_info *info;
struct nv50_ir_prog_info_out info_out = {}; struct nv50_ir_prog_info_out info_out = {};
@ -1079,9 +1078,6 @@ nvk_compile_nir(struct nvk_physical_device *pdev, nir_shader *nir,
info->io.auxCBSlot = 1; info->io.auxCBSlot = 1;
info->io.uboInfoBase = 0; info->io.uboInfoBase = 0;
info->io.drawInfoBase = 0; info->io.drawInfoBase = 0;
if (nir->info.stage == MESA_SHADER_TESS_EVAL) {
info->prop.tese.prespecified_domain = ctx->tesc_domain;
}
if (nir->info.stage == MESA_SHADER_COMPUTE) { if (nir->info.stage == MESA_SHADER_COMPUTE) {
info->prop.cp.gridInfoBase = 0; info->prop.cp.gridInfoBase = 0;
} else { } else {
@ -1155,10 +1151,6 @@ nvk_compile_nir(struct nvk_physical_device *pdev, nir_shader *nir,
} }
} }
if (info->type == PIPE_SHADER_TESS_CTRL) {
ctx->tesc_domain = info_out.prop.tp.domain;
}
return VK_SUCCESS; return VK_SUCCESS;
} }

3
src/nouveau/vulkan/nvk_shader.h
View file

@ -126,8 +126,7 @@ nvk_lower_nir(struct nvk_device *device, nir_shader *nir,
VkResult VkResult
nvk_compile_nir(struct nvk_physical_device *device, nir_shader *nir, nvk_compile_nir(struct nvk_physical_device *device, nir_shader *nir,
const struct nvk_fs_key *fs_key, const struct nvk_fs_key *fs_key,
struct nvk_shader *shader, struct nvk_shader *shader);
struct nvk_pipeline_compilation_ctx *ctx);
VkResult VkResult
nvk_shader_upload(struct nvk_device *dev, struct nvk_shader *shader); nvk_shader_upload(struct nvk_device *dev, struct nvk_shader *shader);