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https://gitlab.freedesktop.org/mesa/mesa.git
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r600g: move cayman MSAA setup to a common place
I will use this in radeonsi. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
This commit is contained in:
Marek Olšák
parent
6a5499b9d9
commit
946d1cfe39
6 changed files with 271 additions and 213 deletions
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@ -1448,30 +1448,7 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx,
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rctx->framebuffer.atom.dirty = true;
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}
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#define FILL_SREG(s0x, s0y, s1x, s1y, s2x, s2y, s3x, s3y) \
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(((s0x) & 0xf) | (((s0y) & 0xf) << 4) | \
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(((s1x) & 0xf) << 8) | (((s1y) & 0xf) << 12) | \
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(((s2x) & 0xf) << 16) | (((s2y) & 0xf) << 20) | \
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(((s3x) & 0xf) << 24) | (((s3y) & 0xf) << 28))
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/* 2xMSAA
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* There are two locations (-4, 4), (4, -4). */
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static uint32_t sample_locs_2x[] = {
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FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4),
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FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4),
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FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4),
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FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4),
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};
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static unsigned max_dist_2x = 4;
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/* 4xMSAA
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* There are 4 locations: (-2, -2), (2, 2), (-6, 6), (6, -6). */
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static uint32_t sample_locs_4x[] = {
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FILL_SREG(-2, -2, 2, 2, -6, 6, 6, -6),
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FILL_SREG(-2, -2, 2, 2, -6, 6, 6, -6),
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FILL_SREG(-2, -2, 2, 2, -6, 6, 6, -6),
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FILL_SREG(-2, -2, 2, 2, -6, 6, 6, -6),
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};
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static unsigned max_dist_4x = 6;
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/* 8xMSAA */
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static uint32_t sample_locs_8x[] = {
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FILL_SREG(-1, 1, 1, 5, 3, -5, 5, 3),
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@ -1501,16 +1478,16 @@ static void evergreen_get_sample_position(struct pipe_context *ctx,
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break;
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case 2:
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offset = 4 * (sample_index * 2);
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val.idx = (sample_locs_2x[0] >> offset) & 0xf;
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val.idx = (eg_sample_locs_2x[0] >> offset) & 0xf;
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out_value[0] = (float)(val.idx + 8) / 16.0f;
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val.idx = (sample_locs_2x[0] >> (offset + 4)) & 0xf;
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val.idx = (eg_sample_locs_2x[0] >> (offset + 4)) & 0xf;
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out_value[1] = (float)(val.idx + 8) / 16.0f;
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break;
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case 4:
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offset = 4 * (sample_index * 2);
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val.idx = (sample_locs_4x[0] >> offset) & 0xf;
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val.idx = (eg_sample_locs_4x[0] >> offset) & 0xf;
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out_value[0] = (float)(val.idx + 8) / 16.0f;
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val.idx = (sample_locs_4x[0] >> (offset + 4)) & 0xf;
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val.idx = (eg_sample_locs_4x[0] >> (offset + 4)) & 0xf;
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out_value[1] = (float)(val.idx + 8) / 16.0f;
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break;
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case 8:
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@ -1535,14 +1512,14 @@ static void evergreen_emit_msaa_state(struct r600_context *rctx, int nr_samples)
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nr_samples = 0;
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break;
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case 2:
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r600_write_context_reg_seq(cs, R_028C1C_PA_SC_AA_SAMPLE_LOCS_0, Elements(sample_locs_2x));
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radeon_emit_array(cs, sample_locs_2x, Elements(sample_locs_2x));
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max_dist = max_dist_2x;
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r600_write_context_reg_seq(cs, R_028C1C_PA_SC_AA_SAMPLE_LOCS_0, Elements(eg_sample_locs_2x));
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radeon_emit_array(cs, eg_sample_locs_2x, Elements(eg_sample_locs_2x));
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max_dist = eg_max_dist_2x;
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break;
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case 4:
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r600_write_context_reg_seq(cs, R_028C1C_PA_SC_AA_SAMPLE_LOCS_0, Elements(sample_locs_4x));
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radeon_emit_array(cs, sample_locs_4x, Elements(sample_locs_4x));
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max_dist = max_dist_4x;
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r600_write_context_reg_seq(cs, R_028C1C_PA_SC_AA_SAMPLE_LOCS_0, Elements(eg_sample_locs_4x));
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radeon_emit_array(cs, eg_sample_locs_4x, Elements(eg_sample_locs_4x));
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max_dist = eg_max_dist_4x;
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break;
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case 8:
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r600_write_context_reg_seq(cs, R_028C1C_PA_SC_AA_SAMPLE_LOCS_0, Elements(sample_locs_8x));
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@ -1564,178 +1541,6 @@ static void evergreen_emit_msaa_state(struct r600_context *rctx, int nr_samples)
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}
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}
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/* Cayman 8xMSAA */
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static uint32_t cm_sample_locs_8x[] = {
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FILL_SREG(-2, -5, 3, -4, -1, 5, -6, -2),
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FILL_SREG(-2, -5, 3, -4, -1, 5, -6, -2),
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FILL_SREG(-2, -5, 3, -4, -1, 5, -6, -2),
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FILL_SREG(-2, -5, 3, -4, -1, 5, -6, -2),
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FILL_SREG( 6, 0, 0, 0, -5, 3, 4, 4),
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FILL_SREG( 6, 0, 0, 0, -5, 3, 4, 4),
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FILL_SREG( 6, 0, 0, 0, -5, 3, 4, 4),
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FILL_SREG( 6, 0, 0, 0, -5, 3, 4, 4),
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};
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static unsigned cm_max_dist_8x = 8;
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/* Cayman 16xMSAA */
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static uint32_t cm_sample_locs_16x[] = {
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FILL_SREG(-7, -3, 7, 3, 1, -5, -5, 5),
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FILL_SREG(-7, -3, 7, 3, 1, -5, -5, 5),
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FILL_SREG(-7, -3, 7, 3, 1, -5, -5, 5),
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FILL_SREG(-7, -3, 7, 3, 1, -5, -5, 5),
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FILL_SREG(-3, -7, 3, 7, 5, -1, -1, 1),
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FILL_SREG(-3, -7, 3, 7, 5, -1, -1, 1),
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FILL_SREG(-3, -7, 3, 7, 5, -1, -1, 1),
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FILL_SREG(-3, -7, 3, 7, 5, -1, -1, 1),
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FILL_SREG(-8, -6, 4, 2, 2, -8, -2, 6),
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FILL_SREG(-8, -6, 4, 2, 2, -8, -2, 6),
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FILL_SREG(-8, -6, 4, 2, 2, -8, -2, 6),
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FILL_SREG(-8, -6, 4, 2, 2, -8, -2, 6),
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FILL_SREG(-4, -2, 0, 4, 6, -4, -6, 0),
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FILL_SREG(-4, -2, 0, 4, 6, -4, -6, 0),
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FILL_SREG(-4, -2, 0, 4, 6, -4, -6, 0),
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FILL_SREG(-4, -2, 0, 4, 6, -4, -6, 0),
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};
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static unsigned cm_max_dist_16x = 8;
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static void cayman_get_sample_position(struct pipe_context *ctx,
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unsigned sample_count,
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unsigned sample_index,
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float *out_value)
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{
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int offset, index;
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struct {
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int idx:4;
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} val;
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switch (sample_count) {
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case 1:
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default:
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out_value[0] = out_value[1] = 0.5;
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break;
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case 2:
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offset = 4 * (sample_index * 2);
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val.idx = (sample_locs_2x[0] >> offset) & 0xf;
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out_value[0] = (float)(val.idx + 8) / 16.0f;
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val.idx = (sample_locs_2x[0] >> (offset + 4)) & 0xf;
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out_value[1] = (float)(val.idx + 8) / 16.0f;
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break;
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case 4:
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offset = 4 * (sample_index * 2);
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val.idx = (sample_locs_4x[0] >> offset) & 0xf;
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out_value[0] = (float)(val.idx + 8) / 16.0f;
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val.idx = (sample_locs_4x[0] >> (offset + 4)) & 0xf;
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out_value[1] = (float)(val.idx + 8) / 16.0f;
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break;
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case 8:
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offset = 4 * (sample_index % 4 * 2);
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index = (sample_index / 4) * 4;
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val.idx = (cm_sample_locs_8x[index] >> offset) & 0xf;
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out_value[0] = (float)(val.idx + 8) / 16.0f;
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val.idx = (cm_sample_locs_8x[index] >> (offset + 4)) & 0xf;
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out_value[1] = (float)(val.idx + 8) / 16.0f;
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break;
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case 16:
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offset = 4 * (sample_index % 4 * 2);
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index = (sample_index / 4) * 4;
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val.idx = (cm_sample_locs_16x[index] >> offset) & 0xf;
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out_value[0] = (float)(val.idx + 8) / 16.0f;
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val.idx = (cm_sample_locs_16x[index] >> (offset + 4)) & 0xf;
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out_value[1] = (float)(val.idx + 8) / 16.0f;
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break;
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}
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}
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static void cayman_emit_msaa_state(struct r600_context *rctx, int nr_samples)
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{
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struct radeon_winsys_cs *cs = rctx->b.rings.gfx.cs;
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unsigned max_dist = 0;
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switch (nr_samples) {
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default:
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nr_samples = 0;
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break;
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case 2:
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r600_write_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs_2x[0]);
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r600_write_context_reg(cs, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs_2x[1]);
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r600_write_context_reg(cs, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, sample_locs_2x[2]);
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r600_write_context_reg(cs, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, sample_locs_2x[3]);
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max_dist = max_dist_2x;
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break;
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case 4:
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r600_write_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs_4x[0]);
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r600_write_context_reg(cs, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs_4x[1]);
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r600_write_context_reg(cs, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, sample_locs_4x[2]);
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r600_write_context_reg(cs, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, sample_locs_4x[3]);
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max_dist = max_dist_4x;
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break;
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case 8:
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r600_write_context_reg_seq(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 14);
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radeon_emit(cs, cm_sample_locs_8x[0]);
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radeon_emit(cs, cm_sample_locs_8x[4]);
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radeon_emit(cs, 0);
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radeon_emit(cs, 0);
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radeon_emit(cs, cm_sample_locs_8x[1]);
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radeon_emit(cs, cm_sample_locs_8x[5]);
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radeon_emit(cs, 0);
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radeon_emit(cs, 0);
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radeon_emit(cs, cm_sample_locs_8x[2]);
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radeon_emit(cs, cm_sample_locs_8x[6]);
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radeon_emit(cs, 0);
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radeon_emit(cs, 0);
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radeon_emit(cs, cm_sample_locs_8x[3]);
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radeon_emit(cs, cm_sample_locs_8x[7]);
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max_dist = cm_max_dist_8x;
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break;
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case 16:
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r600_write_context_reg_seq(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 16);
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radeon_emit(cs, cm_sample_locs_16x[0]);
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radeon_emit(cs, cm_sample_locs_16x[4]);
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radeon_emit(cs, cm_sample_locs_16x[8]);
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radeon_emit(cs, cm_sample_locs_16x[12]);
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radeon_emit(cs, cm_sample_locs_16x[1]);
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radeon_emit(cs, cm_sample_locs_16x[5]);
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radeon_emit(cs, cm_sample_locs_16x[9]);
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radeon_emit(cs, cm_sample_locs_16x[13]);
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radeon_emit(cs, cm_sample_locs_16x[2]);
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radeon_emit(cs, cm_sample_locs_16x[6]);
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radeon_emit(cs, cm_sample_locs_16x[10]);
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radeon_emit(cs, cm_sample_locs_16x[14]);
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radeon_emit(cs, cm_sample_locs_16x[3]);
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radeon_emit(cs, cm_sample_locs_16x[7]);
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radeon_emit(cs, cm_sample_locs_16x[11]);
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radeon_emit(cs, cm_sample_locs_16x[15]);
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max_dist = cm_max_dist_16x;
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break;
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}
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if (nr_samples > 1) {
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unsigned log_samples = util_logbase2(nr_samples);
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r600_write_context_reg_seq(cs, CM_R_028BDC_PA_SC_LINE_CNTL, 2);
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radeon_emit(cs, S_028C00_LAST_PIXEL(1) |
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S_028C00_EXPAND_LINE_WIDTH(1)); /* CM_R_028BDC_PA_SC_LINE_CNTL */
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radeon_emit(cs, S_028BE0_MSAA_NUM_SAMPLES(log_samples) |
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S_028BE0_MAX_SAMPLE_DIST(max_dist) |
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S_028BE0_MSAA_EXPOSED_SAMPLES(log_samples)); /* CM_R_028BE0_PA_SC_AA_CONFIG */
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r600_write_context_reg(cs, CM_R_028804_DB_EQAA,
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S_028804_MAX_ANCHOR_SAMPLES(log_samples) |
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S_028804_PS_ITER_SAMPLES(log_samples) |
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S_028804_MASK_EXPORT_NUM_SAMPLES(log_samples) |
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S_028804_ALPHA_TO_MASK_NUM_SAMPLES(log_samples) |
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S_028804_HIGH_QUALITY_INTERSECTIONS(1) |
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S_028804_STATIC_ANCHOR_ASSOCIATIONS(1));
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} else {
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r600_write_context_reg_seq(cs, CM_R_028BDC_PA_SC_LINE_CNTL, 2);
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radeon_emit(cs, S_028C00_LAST_PIXEL(1)); /* CM_R_028BDC_PA_SC_LINE_CNTL */
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radeon_emit(cs, 0); /* CM_R_028BE0_PA_SC_AA_CONFIG */
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r600_write_context_reg(cs, CM_R_028804_DB_EQAA,
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S_028804_HIGH_QUALITY_INTERSECTIONS(1) |
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S_028804_STATIC_ANCHOR_ASSOCIATIONS(1));
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}
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}
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static void evergreen_emit_framebuffer_state(struct r600_context *rctx, struct r600_atom *atom)
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{
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struct radeon_winsys_cs *cs = rctx->b.rings.gfx.cs;
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@ -1894,7 +1699,7 @@ static void evergreen_emit_framebuffer_state(struct r600_context *rctx, struct r
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if (rctx->b.chip_class == EVERGREEN) {
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evergreen_emit_msaa_state(rctx, rctx->framebuffer.nr_samples);
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} else {
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cayman_emit_msaa_state(rctx, rctx->framebuffer.nr_samples);
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cayman_emit_msaa_state(cs, rctx->framebuffer.nr_samples);
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}
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}
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@ -1240,13 +1240,6 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx,
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rctx->framebuffer.atom.dirty = true;
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}
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#define FILL_SREG(s0x, s0y, s1x, s1y, s2x, s2y, s3x, s3y) \
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(((s0x) & 0xf) | (((s0y) & 0xf) << 4) | \
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(((s1x) & 0xf) << 8) | (((s1y) & 0xf) << 12) | \
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(((s2x) & 0xf) << 16) | (((s2y) & 0xf) << 20) | \
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(((s3x) & 0xf) << 24) | (((s3y) & 0xf) << 28))
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static uint32_t sample_locs_2x[] = {
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FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4),
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FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4),
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@ -1,4 +1,5 @@
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C_SOURCES := \
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cayman_msaa.c \
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r600_buffer_common.c \
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r600_pipe_common.c \
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r600_query.c \
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214
src/gallium/drivers/radeon/cayman_msaa.c
Normal file
214
src/gallium/drivers/radeon/cayman_msaa.c
Normal file
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@ -0,0 +1,214 @@
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/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Authors: Marek Olšák <maraeo@gmail.com>
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*
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*/
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#include "r600_cs.h"
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/* 2xMSAA
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* There are two locations (-4, 4), (4, -4). */
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const uint32_t eg_sample_locs_2x[4] = {
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FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4),
|
||||
FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4),
|
||||
FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4),
|
||||
FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4),
|
||||
};
|
||||
const unsigned eg_max_dist_2x = 4;
|
||||
/* 4xMSAA
|
||||
* There are 4 locations: (-2, -2), (2, 2), (-6, 6), (6, -6). */
|
||||
const uint32_t eg_sample_locs_4x[4] = {
|
||||
FILL_SREG(-2, -2, 2, 2, -6, 6, 6, -6),
|
||||
FILL_SREG(-2, -2, 2, 2, -6, 6, 6, -6),
|
||||
FILL_SREG(-2, -2, 2, 2, -6, 6, 6, -6),
|
||||
FILL_SREG(-2, -2, 2, 2, -6, 6, 6, -6),
|
||||
};
|
||||
const unsigned eg_max_dist_4x = 6;
|
||||
|
||||
/* Cayman 8xMSAA */
|
||||
static const uint32_t cm_sample_locs_8x[] = {
|
||||
FILL_SREG(-2, -5, 3, -4, -1, 5, -6, -2),
|
||||
FILL_SREG(-2, -5, 3, -4, -1, 5, -6, -2),
|
||||
FILL_SREG(-2, -5, 3, -4, -1, 5, -6, -2),
|
||||
FILL_SREG(-2, -5, 3, -4, -1, 5, -6, -2),
|
||||
FILL_SREG( 6, 0, 0, 0, -5, 3, 4, 4),
|
||||
FILL_SREG( 6, 0, 0, 0, -5, 3, 4, 4),
|
||||
FILL_SREG( 6, 0, 0, 0, -5, 3, 4, 4),
|
||||
FILL_SREG( 6, 0, 0, 0, -5, 3, 4, 4),
|
||||
};
|
||||
static const unsigned cm_max_dist_8x = 8;
|
||||
/* Cayman 16xMSAA */
|
||||
static const uint32_t cm_sample_locs_16x[] = {
|
||||
FILL_SREG(-7, -3, 7, 3, 1, -5, -5, 5),
|
||||
FILL_SREG(-7, -3, 7, 3, 1, -5, -5, 5),
|
||||
FILL_SREG(-7, -3, 7, 3, 1, -5, -5, 5),
|
||||
FILL_SREG(-7, -3, 7, 3, 1, -5, -5, 5),
|
||||
FILL_SREG(-3, -7, 3, 7, 5, -1, -1, 1),
|
||||
FILL_SREG(-3, -7, 3, 7, 5, -1, -1, 1),
|
||||
FILL_SREG(-3, -7, 3, 7, 5, -1, -1, 1),
|
||||
FILL_SREG(-3, -7, 3, 7, 5, -1, -1, 1),
|
||||
FILL_SREG(-8, -6, 4, 2, 2, -8, -2, 6),
|
||||
FILL_SREG(-8, -6, 4, 2, 2, -8, -2, 6),
|
||||
FILL_SREG(-8, -6, 4, 2, 2, -8, -2, 6),
|
||||
FILL_SREG(-8, -6, 4, 2, 2, -8, -2, 6),
|
||||
FILL_SREG(-4, -2, 0, 4, 6, -4, -6, 0),
|
||||
FILL_SREG(-4, -2, 0, 4, 6, -4, -6, 0),
|
||||
FILL_SREG(-4, -2, 0, 4, 6, -4, -6, 0),
|
||||
FILL_SREG(-4, -2, 0, 4, 6, -4, -6, 0),
|
||||
};
|
||||
static const unsigned cm_max_dist_16x = 8;
|
||||
|
||||
void cayman_get_sample_position(struct pipe_context *ctx, unsigned sample_count,
|
||||
unsigned sample_index, float *out_value)
|
||||
{
|
||||
int offset, index;
|
||||
struct {
|
||||
int idx:4;
|
||||
} val;
|
||||
switch (sample_count) {
|
||||
case 1:
|
||||
default:
|
||||
out_value[0] = out_value[1] = 0.5;
|
||||
break;
|
||||
case 2:
|
||||
offset = 4 * (sample_index * 2);
|
||||
val.idx = (eg_sample_locs_2x[0] >> offset) & 0xf;
|
||||
out_value[0] = (float)(val.idx + 8) / 16.0f;
|
||||
val.idx = (eg_sample_locs_2x[0] >> (offset + 4)) & 0xf;
|
||||
out_value[1] = (float)(val.idx + 8) / 16.0f;
|
||||
break;
|
||||
case 4:
|
||||
offset = 4 * (sample_index * 2);
|
||||
val.idx = (eg_sample_locs_4x[0] >> offset) & 0xf;
|
||||
out_value[0] = (float)(val.idx + 8) / 16.0f;
|
||||
val.idx = (eg_sample_locs_4x[0] >> (offset + 4)) & 0xf;
|
||||
out_value[1] = (float)(val.idx + 8) / 16.0f;
|
||||
break;
|
||||
case 8:
|
||||
offset = 4 * (sample_index % 4 * 2);
|
||||
index = (sample_index / 4) * 4;
|
||||
val.idx = (cm_sample_locs_8x[index] >> offset) & 0xf;
|
||||
out_value[0] = (float)(val.idx + 8) / 16.0f;
|
||||
val.idx = (cm_sample_locs_8x[index] >> (offset + 4)) & 0xf;
|
||||
out_value[1] = (float)(val.idx + 8) / 16.0f;
|
||||
break;
|
||||
case 16:
|
||||
offset = 4 * (sample_index % 4 * 2);
|
||||
index = (sample_index / 4) * 4;
|
||||
val.idx = (cm_sample_locs_16x[index] >> offset) & 0xf;
|
||||
out_value[0] = (float)(val.idx + 8) / 16.0f;
|
||||
val.idx = (cm_sample_locs_16x[index] >> (offset + 4)) & 0xf;
|
||||
out_value[1] = (float)(val.idx + 8) / 16.0f;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void cayman_emit_msaa_state(struct radeon_winsys_cs *cs, int nr_samples)
|
||||
{
|
||||
unsigned max_dist = 0;
|
||||
|
||||
switch (nr_samples) {
|
||||
default:
|
||||
nr_samples = 0;
|
||||
break;
|
||||
case 2:
|
||||
r600_write_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, eg_sample_locs_2x[0]);
|
||||
r600_write_context_reg(cs, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, eg_sample_locs_2x[1]);
|
||||
r600_write_context_reg(cs, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, eg_sample_locs_2x[2]);
|
||||
r600_write_context_reg(cs, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, eg_sample_locs_2x[3]);
|
||||
max_dist = eg_max_dist_2x;
|
||||
break;
|
||||
case 4:
|
||||
r600_write_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, eg_sample_locs_4x[0]);
|
||||
r600_write_context_reg(cs, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, eg_sample_locs_4x[1]);
|
||||
r600_write_context_reg(cs, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, eg_sample_locs_4x[2]);
|
||||
r600_write_context_reg(cs, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, eg_sample_locs_4x[3]);
|
||||
max_dist = eg_max_dist_4x;
|
||||
break;
|
||||
case 8:
|
||||
r600_write_context_reg_seq(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 14);
|
||||
radeon_emit(cs, cm_sample_locs_8x[0]);
|
||||
radeon_emit(cs, cm_sample_locs_8x[4]);
|
||||
radeon_emit(cs, 0);
|
||||
radeon_emit(cs, 0);
|
||||
radeon_emit(cs, cm_sample_locs_8x[1]);
|
||||
radeon_emit(cs, cm_sample_locs_8x[5]);
|
||||
radeon_emit(cs, 0);
|
||||
radeon_emit(cs, 0);
|
||||
radeon_emit(cs, cm_sample_locs_8x[2]);
|
||||
radeon_emit(cs, cm_sample_locs_8x[6]);
|
||||
radeon_emit(cs, 0);
|
||||
radeon_emit(cs, 0);
|
||||
radeon_emit(cs, cm_sample_locs_8x[3]);
|
||||
radeon_emit(cs, cm_sample_locs_8x[7]);
|
||||
max_dist = cm_max_dist_8x;
|
||||
break;
|
||||
case 16:
|
||||
r600_write_context_reg_seq(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 16);
|
||||
radeon_emit(cs, cm_sample_locs_16x[0]);
|
||||
radeon_emit(cs, cm_sample_locs_16x[4]);
|
||||
radeon_emit(cs, cm_sample_locs_16x[8]);
|
||||
radeon_emit(cs, cm_sample_locs_16x[12]);
|
||||
radeon_emit(cs, cm_sample_locs_16x[1]);
|
||||
radeon_emit(cs, cm_sample_locs_16x[5]);
|
||||
radeon_emit(cs, cm_sample_locs_16x[9]);
|
||||
radeon_emit(cs, cm_sample_locs_16x[13]);
|
||||
radeon_emit(cs, cm_sample_locs_16x[2]);
|
||||
radeon_emit(cs, cm_sample_locs_16x[6]);
|
||||
radeon_emit(cs, cm_sample_locs_16x[10]);
|
||||
radeon_emit(cs, cm_sample_locs_16x[14]);
|
||||
radeon_emit(cs, cm_sample_locs_16x[3]);
|
||||
radeon_emit(cs, cm_sample_locs_16x[7]);
|
||||
radeon_emit(cs, cm_sample_locs_16x[11]);
|
||||
radeon_emit(cs, cm_sample_locs_16x[15]);
|
||||
max_dist = cm_max_dist_16x;
|
||||
break;
|
||||
}
|
||||
|
||||
if (nr_samples > 1) {
|
||||
unsigned log_samples = util_logbase2(nr_samples);
|
||||
|
||||
r600_write_context_reg_seq(cs, CM_R_028BDC_PA_SC_LINE_CNTL, 2);
|
||||
radeon_emit(cs, S_028BDC_LAST_PIXEL(1) |
|
||||
S_028BDC_EXPAND_LINE_WIDTH(1)); /* CM_R_028BDC_PA_SC_LINE_CNTL */
|
||||
radeon_emit(cs, S_028BE0_MSAA_NUM_SAMPLES(log_samples) |
|
||||
S_028BE0_MAX_SAMPLE_DIST(max_dist) |
|
||||
S_028BE0_MSAA_EXPOSED_SAMPLES(log_samples)); /* CM_R_028BE0_PA_SC_AA_CONFIG */
|
||||
|
||||
r600_write_context_reg(cs, CM_R_028804_DB_EQAA,
|
||||
S_028804_MAX_ANCHOR_SAMPLES(log_samples) |
|
||||
S_028804_PS_ITER_SAMPLES(log_samples) |
|
||||
S_028804_MASK_EXPORT_NUM_SAMPLES(log_samples) |
|
||||
S_028804_ALPHA_TO_MASK_NUM_SAMPLES(log_samples) |
|
||||
S_028804_HIGH_QUALITY_INTERSECTIONS(1) |
|
||||
S_028804_STATIC_ANCHOR_ASSOCIATIONS(1));
|
||||
} else {
|
||||
r600_write_context_reg_seq(cs, CM_R_028BDC_PA_SC_LINE_CNTL, 2);
|
||||
radeon_emit(cs, S_028BDC_LAST_PIXEL(1)); /* CM_R_028BDC_PA_SC_LINE_CNTL */
|
||||
radeon_emit(cs, 0); /* CM_R_028BE0_PA_SC_AA_CONFIG */
|
||||
|
||||
r600_write_context_reg(cs, CM_R_028804_DB_EQAA,
|
||||
S_028804_HIGH_QUALITY_INTERSECTIONS(1) |
|
||||
S_028804_STATIC_ANCHOR_ASSOCIATIONS(1));
|
||||
}
|
||||
}
|
||||
|
|
@ -440,6 +440,15 @@ unsigned r600_translate_colorswap(enum pipe_format format);
|
|||
void r600_init_screen_texture_functions(struct r600_common_screen *rscreen);
|
||||
void r600_init_context_texture_functions(struct r600_common_context *rctx);
|
||||
|
||||
/* cayman_msaa.c */
|
||||
extern const uint32_t eg_sample_locs_2x[4];
|
||||
extern const unsigned eg_max_dist_2x;
|
||||
extern const uint32_t eg_sample_locs_4x[4];
|
||||
extern const unsigned eg_max_dist_4x;
|
||||
void cayman_get_sample_position(struct pipe_context *ctx, unsigned sample_count,
|
||||
unsigned sample_index, float *out_value);
|
||||
void cayman_emit_msaa_state(struct radeon_winsys_cs *cs, int nr_samples);
|
||||
|
||||
|
||||
/* Inline helpers. */
|
||||
|
||||
|
|
@ -458,4 +467,11 @@ r600_resource_reference(struct r600_resource **ptr, struct r600_resource *res)
|
|||
#define R600_ERR(fmt, args...) \
|
||||
fprintf(stderr, "EE %s:%d %s - "fmt, __FILE__, __LINE__, __func__, ##args)
|
||||
|
||||
/* For MSAA sample positions. */
|
||||
#define FILL_SREG(s0x, s0y, s1x, s1y, s2x, s2y, s3x, s3y) \
|
||||
(((s0x) & 0xf) | (((s0y) & 0xf) << 4) | \
|
||||
(((s1x) & 0xf) << 8) | (((s1y) & 0xf) << 12) | \
|
||||
(((s2x) & 0xf) << 16) | (((s2y) & 0xf) << 20) | \
|
||||
(((s3x) & 0xf) << 24) | (((s3y) & 0xf) << 28))
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -160,6 +160,35 @@
|
|||
#define G_028B98_STREAM_3_BUFFER_EN(x) (((x) >> 12) & 0x0F)
|
||||
#define C_028B98_STREAM_3_BUFFER_EN 0xFFFF0FFF
|
||||
|
||||
#define CM_R_028804_DB_EQAA 0x00028804
|
||||
#define S_028804_MAX_ANCHOR_SAMPLES(x) (((x) & 0x7) << 0)
|
||||
#define S_028804_PS_ITER_SAMPLES(x) (((x) & 0x7) << 4)
|
||||
#define S_028804_MASK_EXPORT_NUM_SAMPLES(x) (((x) & 0x7) << 8)
|
||||
#define S_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((x) & 0x7) << 12)
|
||||
#define S_028804_HIGH_QUALITY_INTERSECTIONS(x) (((x) & 0x1) << 16)
|
||||
#define S_028804_INCOHERENT_EQAA_READS(x) (((x) & 0x1) << 17)
|
||||
#define S_028804_INTERPOLATE_COMP_Z(x) (((x) & 0x1) << 18)
|
||||
#define S_028804_INTERPOLATE_SRC_Z(x) (((x) & 0x1) << 19)
|
||||
#define S_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((x) & 0x1) << 20)
|
||||
#define S_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((x) & 0x1) << 21)
|
||||
#define CM_R_028BDC_PA_SC_LINE_CNTL 0x28bdc
|
||||
#define S_028BDC_EXPAND_LINE_WIDTH(x) (((x) & 0x1) << 9)
|
||||
#define G_028BDC_EXPAND_LINE_WIDTH(x) (((x) >> 9) & 0x1)
|
||||
#define C_028BDC_EXPAND_LINE_WIDTH 0xFFFFFDFF
|
||||
#define S_028BDC_LAST_PIXEL(x) (((x) & 0x1) << 10)
|
||||
#define G_028BDC_LAST_PIXEL(x) (((x) >> 10) & 0x1)
|
||||
#define C_028BDC_LAST_PIXEL 0xFFFFFBFF
|
||||
#define CM_R_028BE0_PA_SC_AA_CONFIG 0x28be0
|
||||
#define S_028BE0_MSAA_NUM_SAMPLES(x) (((x) & 0x7) << 0)
|
||||
#define S_028BE0_AA_MASK_CENTROID_DTMN(x) (((x) & 0x1) << 4)
|
||||
#define S_028BE0_MAX_SAMPLE_DIST(x) (((x) & 0xf) << 13)
|
||||
#define S_028BE0_MSAA_EXPOSED_SAMPLES(x) (((x) & 0x7) << 20)
|
||||
#define S_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((x) & 0x3) << 24)
|
||||
#define CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 0x28bf8
|
||||
#define CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 0x28c08
|
||||
#define CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 0x28c18
|
||||
#define CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 0x28c28
|
||||
|
||||
/*CIK+*/
|
||||
#define R_0300FC_CP_STRMOUT_CNTL 0x0300FC
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue