From 9312bfb5fb05f8b641eb6360a2af38d946b873ae Mon Sep 17 00:00:00 2001 From: Emma Anholt Date: Wed, 8 Dec 2021 12:28:43 -0800 Subject: [PATCH] r300: Remove unused RC_OPCODE_SFL MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Nothing generates it in the backend. Reviewed-by: Adam Jackson Reviewed-by: Marek Olšák Part-of: --- src/gallium/drivers/r300/compiler/radeon_opcodes.c | 7 ------- src/gallium/drivers/r300/compiler/radeon_opcodes.h | 3 --- .../drivers/r300/compiler/radeon_program_alu.c | 11 +---------- 3 files changed, 1 insertion(+), 20 deletions(-) diff --git a/src/gallium/drivers/r300/compiler/radeon_opcodes.c b/src/gallium/drivers/r300/compiler/radeon_opcodes.c index a0357a0dc6a..b448b904bc1 100644 --- a/src/gallium/drivers/r300/compiler/radeon_opcodes.c +++ b/src/gallium/drivers/r300/compiler/radeon_opcodes.c @@ -260,13 +260,6 @@ const struct rc_opcode_info rc_opcodes[MAX_RC_OPCODE] = { .HasDstReg = 1, .IsComponentwise = 1 }, - { - .Opcode = RC_OPCODE_SFL, - .Name = "SFL", - .NumSrcRegs = 0, - .HasDstReg = 1, - .IsComponentwise = 1 - }, { .Opcode = RC_OPCODE_SGE, .Name = "SGE", diff --git a/src/gallium/drivers/r300/compiler/radeon_opcodes.h b/src/gallium/drivers/r300/compiler/radeon_opcodes.h index 0a0995e106e..b48bf115874 100644 --- a/src/gallium/drivers/r300/compiler/radeon_opcodes.h +++ b/src/gallium/drivers/r300/compiler/radeon_opcodes.h @@ -140,9 +140,6 @@ typedef enum { /** vec4 instruction: dst.c = (src0.c == src1.c) ? 1.0 : 0.0 */ RC_OPCODE_SEQ, - /** vec4 instruction: dst.c = 0.0 */ - RC_OPCODE_SFL, - /** vec4 instruction: dst.c = (src0.c >= src1.c) ? 1.0 : 0.0 */ RC_OPCODE_SGE, diff --git a/src/gallium/drivers/r300/compiler/radeon_program_alu.c b/src/gallium/drivers/r300/compiler/radeon_program_alu.c index 6b7a282e093..5090216b986 100644 --- a/src/gallium/drivers/r300/compiler/radeon_program_alu.c +++ b/src/gallium/drivers/r300/compiler/radeon_program_alu.c @@ -481,13 +481,6 @@ static void transform_SEQ(struct radeon_compiler* c, rc_remove_instruction(inst); } -static void transform_SFL(struct radeon_compiler* c, - struct rc_instruction* inst) -{ - emit1(c, inst->Prev, RC_OPCODE_MOV, &inst->U.I, inst->U.I.DstReg, builtin_zero); - rc_remove_instruction(inst); -} - static void transform_SGE(struct radeon_compiler* c, struct rc_instruction* inst) { @@ -598,7 +591,7 @@ static void transform_SUB(struct radeon_compiler* c, * no userData necessary. * * Eliminates the following ALU instructions: - * CEIL, DPH, DST, FLR, LIT, LRP, POW, SEQ, SFL, SGE, SGT, SLE, SLT, SNE, SUB + * CEIL, DPH, DST, FLR, LIT, LRP, POW, SEQ, SGE, SGT, SLE, SLT, SNE, SUB * using: * MOV, ADD, MUL, MAD, FRC, DP3, LG2, EX2, CMP * @@ -624,7 +617,6 @@ int radeonTransformALU( case RC_OPCODE_ROUND: transform_ROUND(c, inst); return 1; case RC_OPCODE_RSQ: transform_RSQ(c, inst); return 1; case RC_OPCODE_SEQ: transform_SEQ(c, inst); return 1; - case RC_OPCODE_SFL: transform_SFL(c, inst); return 1; case RC_OPCODE_SGE: transform_SGE(c, inst); return 1; case RC_OPCODE_SGT: transform_SGT(c, inst); return 1; case RC_OPCODE_SLE: transform_SLE(c, inst); return 1; @@ -857,7 +849,6 @@ int r300_transform_vertex_alu( return 1; } return 0; - case RC_OPCODE_SFL: transform_SFL(c, inst); return 1; case RC_OPCODE_SGT: transform_r300_vertex_SGT(c, inst); return 1; case RC_OPCODE_SLE: transform_r300_vertex_SLE(c, inst); return 1; case RC_OPCODE_SNE: