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etnaviv: npu: Switch to use etna_core_info

Browse source 
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30806>
This commit is contained in:
Christian Gmeiner 2024-08-21 09:45:38 +02:00 • committed by Marge Bot
parent 226e7d952f
commit 92a6f697d5
5 changed files with 19 additions and 37 deletions
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12
src/gallium/drivers/etnaviv/etnaviv_internal.h
View file

@ -131,24 +131,12 @@ struct etna_specs {
unsigned pixel_pipes;
/* number of constants */
unsigned num_constants;
/* number of NN cores */
unsigned nn_core_count;
/* architecture version of NN cores */
unsigned nn_core_version;
/* number of MAD units per NN core */
unsigned nn_mad_per_core;
/* number of TP cores */
unsigned tp_core_count;
/* Size of on-chip SRAM */
unsigned on_chip_sram_size;
/* Size of SRAM behind AXI */
unsigned axi_sram_size;
/* Number of bits for zero run-length compression */
unsigned nn_zrl_bits;
/* Input buffer size, determines tile size */
unsigned nn_input_buffer_depth;
/* Accumulation buffer size, determines tile size */
unsigned nn_accum_buffer_depth;
};
/* Compiled Gallium state. All the different compiled state atoms are woven

4
src/gallium/drivers/etnaviv/etnaviv_ml.c
View file

@ -237,7 +237,7 @@ etna_ml_subgraph_create(struct pipe_context *pcontext,
unsigned count)
{
struct etna_context *ctx = etna_context(pcontext);
unsigned nn_core_count = ctx->screen->specs.nn_core_count;
unsigned nn_core_count = ctx->screen->info->npu.nn_core_count;
struct etna_ml_subgraph *subgraph;
struct list_head operations;
unsigned tensor_count;
@ -358,7 +358,7 @@ void
etna_ml_subgraph_invoke(struct pipe_context *pctx, struct pipe_ml_subgraph *psubgraph, struct pipe_tensor *input)
{
struct etna_context *ctx = etna_context(pctx);
unsigned tp_core_count = ctx->screen->specs.tp_core_count;
unsigned tp_core_count = ctx->screen->info->npu.tp_core_count;
struct etna_ml_subgraph *subgraph = (struct etna_ml_subgraph *)(psubgraph);
struct etna_cmd_stream *stream = ctx->stream;
static bool is_initialized = false;

26
src/gallium/drivers/etnaviv/etnaviv_ml_nn.c
View file

@ -515,8 +515,8 @@ etna_ml_lower_add(struct etna_ml_subgraph *subgraph,
static unsigned
calc_superblocks(struct etna_context *ctx, const struct etna_operation *operation, unsigned tile_y, unsigned interleave_mode)
{
unsigned nn_core_count = ctx->screen->specs.nn_core_count;
unsigned nn_accum_buffer_depth = ctx->screen->specs.nn_accum_buffer_depth;
unsigned nn_core_count = ctx->screen->info->npu.nn_core_count;
unsigned nn_accum_buffer_depth = ctx->screen->info->npu.nn_accum_buffer_depth;
unsigned output_channels = operation->addition ? 1 : operation->output_channels;
unsigned kernels_per_core = DIV_ROUND_UP(output_channels, nn_core_count);
unsigned foo = (nn_accum_buffer_depth * interleave_mode) / tile_y;
@ -590,8 +590,8 @@ calc_addition_sizes(unsigned *input_width, unsigned *input_height, unsigned *inp
static unsigned
calculate_tiling(struct etna_context *ctx, const struct etna_operation *operation, unsigned *tile_width_out, unsigned *tile_height_out)
{
unsigned nn_input_buffer_depth = ctx->screen->specs.nn_input_buffer_depth;
unsigned nn_accum_buffer_depth = ctx->screen->specs.nn_accum_buffer_depth;
unsigned nn_input_buffer_depth = ctx->screen->info->npu.nn_input_buffer_depth;
unsigned nn_accum_buffer_depth = ctx->screen->info->npu.nn_accum_buffer_depth;
unsigned input_width = operation->input_width;
unsigned input_height = operation->input_height;
unsigned input_channels = operation->input_channels;
@ -639,9 +639,9 @@ create_nn_config(struct etna_ml_subgraph *subgraph, const struct etna_operation
{
struct pipe_context *context = subgraph->base.context;
struct etna_context *ctx = etna_context(context);
unsigned nn_core_count = ctx->screen->specs.nn_core_count;
unsigned nn_core_count = ctx->screen->info->npu.nn_core_count;
unsigned nn_core_version = ctx->screen->specs.nn_core_version;
unsigned oc_sram_size = ctx->screen->specs.on_chip_sram_size;
unsigned oc_sram_size = ctx->screen->info->npu.on_chip_sram_size;
struct etna_bo *bo = etna_bo_new(ctx->screen->dev,
sizeof(struct etna_nn_params),
DRM_ETNA_GEM_CACHE_WC);
@ -967,7 +967,7 @@ static unsigned
write_core_6(struct etna_ml_subgraph *subgraph, uint32_t *map, unsigned core, const struct etna_operation *operation, unsigned zrl_bits)
{
struct pipe_context *pctx = subgraph->base.context;
unsigned nn_core_count = etna_context(pctx)->screen->specs.nn_core_count;
unsigned nn_core_count = etna_context(pctx)->screen->info->npu.nn_core_count;
unsigned input_channels = operation->addition ? 1 : operation->input_channels;
unsigned output_channels = operation->addition ? 1 : operation->output_channels;
unsigned cores_used = MIN2(output_channels, nn_core_count);
@ -1047,7 +1047,7 @@ static unsigned
write_core_interleaved(struct etna_ml_subgraph *subgraph, uint32_t *map, unsigned core, const struct etna_operation *operation, unsigned zrl_bits)
{
struct pipe_context *pctx = subgraph->base.context;
unsigned nn_core_count = etna_context(pctx)->screen->specs.nn_core_count;
unsigned nn_core_count = etna_context(pctx)->screen->info->npu.nn_core_count;
unsigned input_channels = operation->addition ? 1 : operation->input_channels;
unsigned output_channels = operation->addition ? 1 : operation->output_channels;
unsigned cores_used = MIN2(output_channels, nn_core_count);
@ -1134,7 +1134,7 @@ static unsigned
write_core_sequential(struct etna_ml_subgraph *subgraph, uint32_t *map, unsigned core, const struct etna_operation *operation, unsigned zrl_bits)
{
struct pipe_context *pctx = subgraph->base.context;
unsigned nn_core_count = etna_context(pctx)->screen->specs.nn_core_count;
unsigned nn_core_count = etna_context(pctx)->screen->info->npu.nn_core_count;
unsigned output_channels = operation->addition ? 1 : operation->output_channels;
unsigned cores_used = MIN2(output_channels, nn_core_count);
unsigned kernels_per_core = DIV_ROUND_UP(output_channels, cores_used);
@ -1221,7 +1221,7 @@ calculate_weight_bo_size(struct etna_ml_subgraph *subgraph, const struct etna_op
{
struct pipe_context *context = subgraph->base.context;
struct etna_context *ctx = etna_context(context);
unsigned nn_core_count = ctx->screen->specs.nn_core_count;
unsigned nn_core_count = ctx->screen->info->npu.nn_core_count;
unsigned header_size = ALIGN(nn_core_count * 4, 64);
unsigned input_channels = operation->addition ? 1 : operation->input_channels;
unsigned output_channels = operation->addition ? 1 : operation->output_channels;
@ -1245,8 +1245,8 @@ calculate_zrl_bits(struct etna_ml_subgraph *subgraph, const struct etna_operatio
{
struct pipe_context *context = subgraph->base.context;
struct etna_context *ctx = etna_context(context);
unsigned nn_core_count = ctx->screen->specs.nn_core_count;
unsigned max_zrl_bits = ctx->screen->specs.nn_zrl_bits;
unsigned nn_core_count = ctx->screen->info->npu.nn_core_count;
unsigned max_zrl_bits = ctx->screen->info->npu.nn_zrl_bits;
unsigned header_size = ALIGN(nn_core_count * 4, 64);
unsigned input_channels = operation->addition ? 1 : operation->input_channels;
unsigned output_channels = operation->addition ? 1 : operation->output_channels;
@ -1298,7 +1298,7 @@ create_coefficients_bo(struct etna_ml_subgraph *subgraph, const struct etna_oper
{
struct pipe_context *context = subgraph->base.context;
struct etna_context *ctx = etna_context(context);
unsigned nn_core_count = ctx->screen->specs.nn_core_count;
unsigned nn_core_count = ctx->screen->info->npu.nn_core_count;
unsigned header_size = ALIGN(nn_core_count * 4, 64);
unsigned input_channels = operation->addition ? 1 : operation->input_channels;
unsigned output_channels = operation->addition ? 1 : operation->output_channels;

8
src/gallium/drivers/etnaviv/etnaviv_ml_tp.c
View file

@ -394,7 +394,7 @@ create_reshuffle_config(struct etna_ml_subgraph *subgraph, const struct etna_ope
unsigned tp_core, unsigned tp_cores_used)
{
struct etna_context *ctx = etna_context(subgraph->base.context);
unsigned tp_core_count = ctx->screen->specs.tp_core_count;
unsigned tp_core_count = ctx->screen->info->npu.tp_core_count;
struct etna_bo *bo = etna_bo_new(ctx->screen->dev,
sizeof(struct etna_tp_params),
DRM_ETNA_GEM_CACHE_WC);
@ -730,7 +730,7 @@ etna_ml_compile_operation_tp(struct etna_ml_subgraph *subgraph,
instruction->configs[0] = create_detranspose_config(subgraph, operation);
break;
case ETNA_ML_TP_RESHUFFLE: {
unsigned tp_core_count = ctx->screen->specs.tp_core_count;
unsigned tp_core_count = ctx->screen->info->npu.tp_core_count;
unsigned tp_cores_used;
tp_cores_used = (operation->input_width > 8 || operation->input_channels > 1) ? tp_core_count : 1;
@ -756,7 +756,7 @@ etna_ml_emit_operation_tp(struct etna_ml_subgraph *subgraph,
unsigned idx)
{
struct etna_context *ctx = etna_context(subgraph->base.context);
unsigned tp_core_count = ctx->screen->specs.tp_core_count;
unsigned tp_core_count = ctx->screen->info->npu.tp_core_count;
struct etna_cmd_stream *stream = ctx->stream;
bool more_than_one_tp_job = operation->configs[1] != NULL;
bool parallel = DBG_ENABLED(ETNA_DBG_NPU_PARALLEL);
@ -777,4 +777,4 @@ etna_ml_emit_operation_tp(struct etna_ml_subgraph *subgraph,
});
}
etna_set_state(stream, VIVS_PS_UNK10A4, parallel ? idx + 1 : 0x0);
}
}

6
src/gallium/drivers/etnaviv/etnaviv_screen.c
View file

@ -863,14 +863,8 @@ etna_get_specs(struct etna_screen *screen)
}
if (info->type == ETNA_CORE_NPU) {
screen->specs.nn_core_count = info->npu.nn_core_count;
screen->specs.nn_mad_per_core = info->npu.nn_mad_per_core;
screen->specs.tp_core_count = info->npu.tp_core_count;
screen->specs.on_chip_sram_size = info->npu.on_chip_sram_size;
screen->specs.axi_sram_size = info->npu.axi_sram_size;
screen->specs.nn_zrl_bits = info->npu.nn_zrl_bits;
screen->specs.nn_input_buffer_depth = info->npu.nn_input_buffer_depth;
screen->specs.nn_accum_buffer_depth = info->npu.nn_accum_buffer_depth;
if (etna_core_has_feature(info, ETNA_FEATURE_NN_XYDP0))
screen->specs.nn_core_version = 8;