mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-07 20:08:06 +02:00
radeon: settexbuffer support
This gets DRI2 compiz going
This commit is contained in:
parent
26d0172a5b
commit
924bf0d8d3
4 changed files with 119 additions and 1 deletions
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@ -335,6 +335,11 @@ static const __DRItexOffsetExtension radeonTexOffsetExtension = {
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{ __DRI_TEX_OFFSET, __DRI_TEX_OFFSET_VERSION },
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radeonSetTexOffset,
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};
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static const __DRItexBufferExtension radeonTexBufferExtension = {
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{ __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
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radeonSetTexBuffer,
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};
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#endif
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#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
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@ -1088,6 +1093,7 @@ radeonCreateScreen2(__DRIscreenPrivate *sPriv)
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#if !RADEON_COMMON
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screen->extensions[i++] = &radeonTexOffsetExtension.base;
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screen->extensions[i++] = &radeonTexBufferExtension.base;
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#endif
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#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
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@ -558,7 +558,7 @@ static void tex_emit_cs(GLcontext *ctx, struct radeon_state_atom *atom)
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if (hastexture) {
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OUT_BATCH(CP_PACKET0(RADEON_PP_TXOFFSET_0 + (24 * i), 0));
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if (t && t->mt && !t->image_override) {
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if (t->mt && !t->image_override) {
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if ((ctx->Texture.Unit[i]._ReallyEnabled & TEXTURE_CUBE_BIT)) {
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lvl = &t->mt->levels[0];
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OUT_BATCH_RELOC(lvl->faces[5].offset, t->mt->bo, lvl->faces[5].offset,
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@ -41,6 +41,7 @@ extern void radeonSetTexOffset(__DRIcontext *pDRICtx, GLint texname,
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unsigned long long offset, GLint depth,
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GLuint pitch);
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extern void radeonSetTexBuffer(__DRIcontext *pDRICtx, GLint target, __DRIdrawable *dPriv);
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extern void radeonUpdateTextureState( GLcontext *ctx );
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extern int radeonUploadTexImages( r100ContextPtr rmesa, radeonTexObjPtr t,
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@ -39,6 +39,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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#include "main/context.h"
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#include "main/macros.h"
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#include "main/texformat.h"
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#include "main/teximage.h"
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#include "main/texobj.h"
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#include "main/enums.h"
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@ -636,6 +637,112 @@ void radeonSetTexOffset(__DRIcontext * pDRICtx, GLint texname,
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}
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}
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void radeonSetTexBuffer(__DRIcontext *pDRICtx, GLint target, __DRIdrawable *dPriv)
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{
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struct gl_texture_unit *texUnit;
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struct gl_texture_object *texObj;
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struct gl_texture_image *texImage;
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struct radeon_renderbuffer *rb;
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radeon_texture_image *rImage;
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radeonContextPtr radeon;
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r100ContextPtr rmesa;
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struct radeon_framebuffer *rfb;
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radeonTexObjPtr t;
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uint32_t pitch_val;
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target = GL_TEXTURE_RECTANGLE_ARB;
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radeon = pDRICtx->driverPrivate;
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rmesa = pDRICtx->driverPrivate;
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rfb = dPriv->driverPrivate;
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texUnit = &radeon->glCtx->Texture.Unit[radeon->glCtx->Texture.CurrentUnit];
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texObj = _mesa_select_tex_object(radeon->glCtx, texUnit, target);
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texImage = _mesa_get_tex_image(radeon->glCtx, texObj, target, 0);
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rImage = get_radeon_texture_image(texImage);
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t = radeon_tex_obj(texObj);
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if (t == NULL) {
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return;
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}
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radeon_update_renderbuffers(pDRICtx, dPriv);
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/* back & depth buffer are useless free them right away */
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rb = (void*)rfb->base.Attachment[BUFFER_DEPTH].Renderbuffer;
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if (rb && rb->bo) {
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radeon_bo_unref(rb->bo);
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rb->bo = NULL;
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}
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rb = (void*)rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer;
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if (rb && rb->bo) {
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radeon_bo_unref(rb->bo);
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rb->bo = NULL;
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}
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rb = (void*)rfb->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer;
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if (rb->bo == NULL) {
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/* Failed to BO for the buffer */
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return;
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}
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_mesa_lock_texture(radeon->glCtx, texObj);
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if (t->bo) {
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radeon_bo_unref(t->bo);
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t->bo = NULL;
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}
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if (rImage->bo) {
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radeon_bo_unref(rImage->bo);
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rImage->bo = NULL;
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}
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if (t->mt) {
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radeon_miptree_unreference(t->mt);
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t->mt = NULL;
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}
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if (rImage->mt) {
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radeon_miptree_unreference(rImage->mt);
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rImage->mt = NULL;
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}
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fprintf(stderr,"settexbuf %d %dx%d@%d\n", rb->pitch, rb->width, rb->height, rb->cpp);
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_mesa_init_teximage_fields(radeon->glCtx, target, texImage,
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rb->width, rb->height, 1, 0, rb->cpp);
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texImage->TexFormat = &_mesa_texformat_rgba8888_rev;
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rImage->bo = rb->bo;
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radeon_bo_ref(rImage->bo);
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t->bo = rb->bo;
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radeon_bo_ref(t->bo);
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t->tile_bits = 0;
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t->image_override = GL_TRUE;
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t->override_offset = 0;
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t->pp_txpitch &= (1 << 13) -1;
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pitch_val = rb->pitch;
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switch (rb->cpp) {
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case 4:
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t->pp_txformat = tx_table[MESA_FORMAT_ARGB8888].format;
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t->pp_txfilter |= tx_table[MESA_FORMAT_ARGB8888].filter;
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// pitch_val /= 4;
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break;
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case 3:
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default:
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t->pp_txformat = tx_table[MESA_FORMAT_RGB888].format;
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t->pp_txfilter |= tx_table[MESA_FORMAT_RGB888].filter;
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// pitch_val /= 4;
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break;
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case 2:
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t->pp_txformat = tx_table[MESA_FORMAT_RGB565].format;
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t->pp_txfilter |= tx_table[MESA_FORMAT_RGB565].filter;
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pitch_val /= 2;
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break;
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}
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t->pp_txsize = ((rb->width - 1) << RADEON_TEX_USIZE_SHIFT)
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| ((rb->height - 1) << RADEON_TEX_VSIZE_SHIFT);
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t->pp_txformat |= RADEON_TXFORMAT_NON_POWER2;
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t->pp_txpitch = pitch_val;
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t->pp_txpitch -= 32;
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t->validated = GL_TRUE;
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_mesa_unlock_texture(radeon->glCtx, texObj);
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return;
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}
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#define TEXOBJ_TXFILTER_MASK (RADEON_MAX_MIP_LEVEL_MASK | \
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RADEON_MIN_FILTER_MASK | \
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RADEON_MAG_FILTER_MASK | \
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@ -899,6 +1006,10 @@ static GLboolean setup_hardware_state(r100ContextPtr rmesa, radeonTexObj *t, int
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const struct gl_texture_image *firstImage;
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GLint log2Width, log2Height, log2Depth, texelBytes;
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if ( t->image_override ) {
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return GL_TRUE;
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}
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firstImage = t->base.Image[0][t->mt->firstLevel];
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if (firstImage->Border > 0) {
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