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radv: split cmdbuf dirty flags into dirty/dirty_dynamic

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We are out of bits.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29039>
This commit is contained in:
Samuel Pitoiset 2024-04-29 10:42:22 +02:00
parent db7bfe85ae
commit 92337aff03
3 changed files with 145 additions and 122 deletions
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2
src/amd/vulkan/meta/radv_meta.c
View file

@ -196,7 +196,7 @@ radv_meta_restore(const struct radv_meta_saved_state *state, struct radv_cmd_buf
/* Restore all dynamic states. */
cmd_buffer->state.dynamic = state->dynamic;
cmd_buffer->state.dirty |= RADV_DYNAMIC_ALL;
cmd_buffer->state.dirty_dynamic |= RADV_DYNAMIC_ALL;
/* Re-emit the guardband state because meta operations changed dynamic states. */
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_GUARDBAND;

230
src/amd/vulkan/radv_cmd_buffer.c
View file

@ -234,7 +234,7 @@ radv_bind_dynamic_state(struct radv_cmd_buffer *cmd_buffer, const struct radv_dy
#undef RADV_CMP_COPY
cmd_buffer->state.dirty |= dest_mask;
cmd_buffer->state.dirty_dynamic |= dest_mask;
/* Handle driver specific states that need to be re-emitted when PSO are bound. */
if (dest_mask & (RADV_DYNAMIC_VIEWPORT | RADV_DYNAMIC_POLYGON_MODE | RADV_DYNAMIC_LINE_WIDTH |
@ -1929,18 +1929,18 @@ radv_emit_graphics_pipeline(struct radv_cmd_buffer *cmd_buffer)
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_GUARDBAND;
if (cmd_buffer->state.emitted_graphics_pipeline->rast_prim != pipeline->rast_prim)
cmd_buffer->state.dirty |=
cmd_buffer->state.dirty_dynamic |=
RADV_CMD_DIRTY_DYNAMIC_PRIMITIVE_TOPOLOGY | RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES;
if (cmd_buffer->state.emitted_graphics_pipeline->ms.min_sample_shading != pipeline->ms.min_sample_shading ||
cmd_buffer->state.emitted_graphics_pipeline->uses_out_of_order_rast != pipeline->uses_out_of_order_rast ||
cmd_buffer->state.emitted_graphics_pipeline->uses_vrs_attachment != pipeline->uses_vrs_attachment)
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES;
cmd_buffer->state.dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES;
if (cmd_buffer->state.emitted_graphics_pipeline->ms.sample_shading_enable != pipeline->ms.sample_shading_enable) {
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES;
cmd_buffer->state.dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES;
if (pdev->info.gfx_level >= GFX10_3)
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_FRAGMENT_SHADING_RATE;
cmd_buffer->state.dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_FRAGMENT_SHADING_RATE;
}
if (cmd_buffer->state.emitted_graphics_pipeline->db_render_control != pipeline->db_render_control)
@ -4621,7 +4621,7 @@ radv_cmd_buffer_flush_dynamic_state(struct radv_cmd_buffer *cmd_buffer, const ui
/* RADV_CMD_DIRTY_DYNAMIC_ATTACHMENT_FEEDBACK_LOOP_ENABLE is handled by radv_emit_db_shader_control. */
cmd_buffer->state.dirty &= ~states;
cmd_buffer->state.dirty_dynamic &= ~states;
}
static void
@ -6060,8 +6060,9 @@ radv_BeginCommandBuffer(VkCommandBuffer commandBuffer, const VkCommandBufferBegi
cmd_buffer->state.last_db_shader_control = -1;
cmd_buffer->usage_flags = pBeginInfo->flags;
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_ALL | RADV_CMD_DIRTY_GUARDBAND | RADV_CMD_DIRTY_OCCLUSION_QUERY |
RADV_CMD_DIRTY_DB_SHADER_CONTROL;
cmd_buffer->state.dirty |=
RADV_CMD_DIRTY_GUARDBAND | RADV_CMD_DIRTY_OCCLUSION_QUERY | RADV_CMD_DIRTY_DB_SHADER_CONTROL;
cmd_buffer->state.dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_ALL;
if (cmd_buffer->qf == RADV_QUEUE_GENERAL)
vk_dynamic_graphics_state_init(&cmd_buffer->state.dynamic.vk);
@ -6212,7 +6213,8 @@ radv_CmdBindVertexBuffers2(VkCommandBuffer commandBuffer, uint32_t firstBinding,
cmd_buffer->state.vbo_misaligned_mask &= ~misaligned_mask_invalid;
}
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_VERTEX_BUFFER | RADV_CMD_DIRTY_DYNAMIC_VERTEX_INPUT;
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_VERTEX_BUFFER;
cmd_buffer->state.dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_VERTEX_INPUT;
}
static uint32_t
@ -6276,7 +6278,7 @@ radv_CmdBindIndexBuffer2KHR(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDe
/* Primitive restart state depends on the index type. */
if (cmd_buffer->state.dynamic.vk.ia.primitive_restart_enable)
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_PRIMITIVE_RESTART_ENABLE;
cmd_buffer->state.dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_PRIMITIVE_RESTART_ENABLE;
}
static void
@ -6647,7 +6649,7 @@ radv_bind_vs_input_state(struct radv_cmd_buffer *cmd_buffer, const struct radv_g
cmd_buffer->state.vbo_misaligned_mask_invalid = src->attribute_mask;
}
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_VERTEX_INPUT;
cmd_buffer->state.dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_VERTEX_INPUT;
}
static void
@ -6664,7 +6666,7 @@ radv_bind_custom_blend_mode(struct radv_cmd_buffer *cmd_buffer, unsigned custom_
{
/* Re-emit CB_COLOR_CONTROL when the custom blending mode changes. */
if (cmd_buffer->state.custom_blend_mode != custom_blend_mode)
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_LOGIC_OP | RADV_CMD_DIRTY_DYNAMIC_LOGIC_OP_ENABLE;
cmd_buffer->state.dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_LOGIC_OP | RADV_CMD_DIRTY_DYNAMIC_LOGIC_OP_ENABLE;
cmd_buffer->state.custom_blend_mode = custom_blend_mode;
}
@ -6683,7 +6685,7 @@ radv_bind_pre_rast_shader(struct radv_cmd_buffer *cmd_buffer, const struct radv_
if (radv_get_user_sgpr(shader, AC_UD_NGG_PROVOKING_VTX)->sgpr_idx != -1) {
/* Re-emit the provoking vertex mode state because the SGPR idx can be different. */
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_PROVOKING_VERTEX_MODE;
cmd_buffer->state.dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_PROVOKING_VERTEX_MODE;
}
if (radv_get_user_sgpr(shader, AC_UD_STREAMOUT_BUFFERS)->sgpr_idx != -1) {
@ -6700,7 +6702,7 @@ radv_bind_pre_rast_shader(struct radv_cmd_buffer *cmd_buffer, const struct radv_
if (radv_get_user_sgpr(shader, AC_UD_NUM_VERTS_PER_PRIM)->sgpr_idx != -1) {
/* Re-emit the primitive topology because the SGPR idx can be different. */
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_PRIMITIVE_TOPOLOGY;
cmd_buffer->state.dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_PRIMITIVE_TOPOLOGY;
}
if (radv_get_user_sgpr(shader, AC_UD_SHADER_QUERY_STATE)->sgpr_idx != -1) {
@ -6738,7 +6740,7 @@ radv_bind_pre_rast_shader(struct radv_cmd_buffer *cmd_buffer, const struct radv_
/* Re-emit VRS state because the combiner is different (vertex vs primitive). Re-emit
* primitive topology because the mesh shading pipeline clobbered it.
*/
cmd_buffer->state.dirty |=
cmd_buffer->state.dirty_dynamic |=
RADV_CMD_DIRTY_DYNAMIC_FRAGMENT_SHADING_RATE | RADV_CMD_DIRTY_DYNAMIC_PRIMITIVE_TOPOLOGY;
}
@ -6754,7 +6756,7 @@ radv_bind_vertex_shader(struct radv_cmd_buffer *cmd_buffer, const struct radv_sh
* because shader configs are combined.
*/
if (vs->info.merged_shader_compiled_separately && vs->info.next_stage == MESA_SHADER_TESS_CTRL) {
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_PATCH_CONTROL_POINTS;
cmd_buffer->state.dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_PATCH_CONTROL_POINTS;
}
/* Can't put anything else here due to merged shaders */
@ -6770,7 +6772,8 @@ radv_bind_tess_ctrl_shader(struct radv_cmd_buffer *cmd_buffer, const struct radv
/* Always re-emit patch control points/domain origin when a new pipeline with tessellation is
* bound because a bunch of parameters (user SGPRs, TCS vertices out, ccw, etc) can be different.
*/
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_PATCH_CONTROL_POINTS | RADV_CMD_DIRTY_DYNAMIC_TESS_DOMAIN_ORIGIN;
cmd_buffer->state.dirty_dynamic |=
RADV_CMD_DIRTY_DYNAMIC_PATCH_CONTROL_POINTS | RADV_CMD_DIRTY_DYNAMIC_TESS_DOMAIN_ORIGIN;
/* Re-emit the VS prolog when the tessellation control shader is compiled separately because
* shader configs are combined and need to be updated.
@ -6839,30 +6842,30 @@ radv_bind_fragment_shader(struct radv_cmd_buffer *cmd_buffer, const struct radv_
/* Re-emit the FS state because the SGPR idx can be different. */
if (radv_get_user_sgpr(ps, AC_UD_PS_STATE)->sgpr_idx != -1) {
cmd_buffer->state.dirty |=
cmd_buffer->state.dirty_dynamic |=
RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES | RADV_CMD_DIRTY_DYNAMIC_LINE_RASTERIZATION_MODE;
}
/* Re-emit the conservative rasterization mode because inner coverage is different. */
if (!previous_ps || previous_ps->info.ps.reads_fully_covered != ps->info.ps.reads_fully_covered)
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_CONSERVATIVE_RAST_MODE;
cmd_buffer->state.dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_CONSERVATIVE_RAST_MODE;
if (gfx_level >= GFX10_3 && (!previous_ps || previous_ps->info.ps.force_sample_iter_shading_rate !=
ps->info.ps.force_sample_iter_shading_rate))
cmd_buffer->state.dirty |=
cmd_buffer->state.dirty_dynamic |=
RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES | RADV_CMD_DIRTY_DYNAMIC_FRAGMENT_SHADING_RATE;
if (cmd_buffer->state.ms.sample_shading_enable != ps->info.ps.uses_sample_shading) {
cmd_buffer->state.ms.sample_shading_enable = ps->info.ps.uses_sample_shading;
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES;
cmd_buffer->state.dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES;
if (gfx_level >= GFX10_3)
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_FRAGMENT_SHADING_RATE;
cmd_buffer->state.dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_FRAGMENT_SHADING_RATE;
}
if (cmd_buffer->state.ms.min_sample_shading != min_sample_shading) {
cmd_buffer->state.ms.min_sample_shading = min_sample_shading;
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES;
cmd_buffer->state.dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES;
}
if (!previous_ps || previous_ps->info.ps.db_shader_control != ps->info.ps.db_shader_control ||
@ -6910,9 +6913,10 @@ radv_bind_shader(struct radv_cmd_buffer *cmd_buffer, struct radv_shader *shader,
/* Reset some dynamic states when a shader stage is unbound. */
switch (stage) {
case MESA_SHADER_FRAGMENT:
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_CONSERVATIVE_RAST_MODE |
RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES |
RADV_CMD_DIRTY_DYNAMIC_FRAGMENT_SHADING_RATE | RADV_CMD_DIRTY_DB_SHADER_CONTROL;
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DB_SHADER_CONTROL;
cmd_buffer->state.dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_CONSERVATIVE_RAST_MODE |
RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES |
RADV_CMD_DIRTY_DYNAMIC_FRAGMENT_SHADING_RATE;
break;
default:
break;
@ -7108,7 +7112,7 @@ radv_CmdBindPipeline(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipeline
/* Re-emit the VS prolog when a new vertex shader is bound. */
if (vs->info.vs.has_prolog) {
cmd_buffer->state.emitted_vs_prolog = NULL;
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_VERTEX_INPUT;
cmd_buffer->state.dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_VERTEX_INPUT;
}
/* Re-emit the vertex buffer descriptors because they are really tied to the pipeline. */
@ -7181,7 +7185,8 @@ radv_CmdSetViewport(VkCommandBuffer commandBuffer, uint32_t firstViewport, uint3
state->dynamic.hw_vp.xform[i + firstViewport].translate);
}
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_VIEWPORT | RADV_CMD_DIRTY_GUARDBAND;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_VIEWPORT;
state->dirty |= RADV_CMD_DIRTY_GUARDBAND;
}
VKAPI_ATTR void VKAPI_CALL
@ -7200,7 +7205,7 @@ radv_CmdSetScissor(VkCommandBuffer commandBuffer, uint32_t firstScissor, uint32_
memcpy(state->dynamic.vk.vp.scissors + firstScissor, pScissors, scissorCount * sizeof(*pScissors));
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_SCISSOR;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_SCISSOR;
}
VKAPI_ATTR void VKAPI_CALL
@ -7211,7 +7216,8 @@ radv_CmdSetLineWidth(VkCommandBuffer commandBuffer, float lineWidth)
state->dynamic.vk.rs.line.width = lineWidth;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_LINE_WIDTH | RADV_CMD_DIRTY_GUARDBAND;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_LINE_WIDTH;
state->dirty |= RADV_CMD_DIRTY_GUARDBAND;
}
VKAPI_ATTR void VKAPI_CALL
@ -7222,7 +7228,7 @@ radv_CmdSetBlendConstants(VkCommandBuffer commandBuffer, const float blendConsta
memcpy(state->dynamic.vk.cb.blend_constants, blendConstants, sizeof(float) * 4);
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS;
}
VKAPI_ATTR void VKAPI_CALL
@ -7234,7 +7240,7 @@ radv_CmdSetDepthBounds(VkCommandBuffer commandBuffer, float minDepthBounds, floa
state->dynamic.vk.ds.depth.bounds_test.min = minDepthBounds;
state->dynamic.vk.ds.depth.bounds_test.max = maxDepthBounds;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS;
}
VKAPI_ATTR void VKAPI_CALL
@ -7248,7 +7254,7 @@ radv_CmdSetStencilCompareMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags
if (faceMask & VK_STENCIL_FACE_BACK_BIT)
state->dynamic.vk.ds.stencil.back.compare_mask = compareMask;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK;
}
VKAPI_ATTR void VKAPI_CALL
@ -7262,7 +7268,7 @@ radv_CmdSetStencilWriteMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags fa
if (faceMask & VK_STENCIL_FACE_BACK_BIT)
state->dynamic.vk.ds.stencil.back.write_mask = writeMask;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK;
}
VKAPI_ATTR void VKAPI_CALL
@ -7276,7 +7282,7 @@ radv_CmdSetStencilReference(VkCommandBuffer commandBuffer, VkStencilFaceFlags fa
if (faceMask & VK_STENCIL_FACE_BACK_BIT)
state->dynamic.vk.ds.stencil.back.reference = reference;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7292,7 +7298,7 @@ radv_CmdSetDiscardRectangleEXT(VkCommandBuffer commandBuffer, uint32_t firstDisc
typed_memcpy(&state->dynamic.vk.dr.rectangles[firstDiscardRectangle], pDiscardRectangles, discardRectangleCount);
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_DISCARD_RECTANGLE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_DISCARD_RECTANGLE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7309,7 +7315,7 @@ radv_CmdSetSampleLocationsEXT(VkCommandBuffer commandBuffer, const VkSampleLocat
typed_memcpy(&state->dynamic.sample_location.locations[0], pSampleLocationsInfo->pSampleLocations,
pSampleLocationsInfo->sampleLocationsCount);
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_SAMPLE_LOCATIONS;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_SAMPLE_LOCATIONS;
}
VKAPI_ATTR void VKAPI_CALL
@ -7321,7 +7327,7 @@ radv_CmdSetLineStippleKHR(VkCommandBuffer commandBuffer, uint32_t lineStippleFac
state->dynamic.vk.rs.line.stipple.factor = lineStippleFactor;
state->dynamic.vk.rs.line.stipple.pattern = lineStipplePattern;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_LINE_STIPPLE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_LINE_STIPPLE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7332,7 +7338,7 @@ radv_CmdSetCullMode(VkCommandBuffer commandBuffer, VkCullModeFlags cullMode)
state->dynamic.vk.rs.cull_mode = cullMode;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_CULL_MODE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_CULL_MODE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7343,7 +7349,7 @@ radv_CmdSetFrontFace(VkCommandBuffer commandBuffer, VkFrontFace frontFace)
state->dynamic.vk.rs.front_face = frontFace;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_FRONT_FACE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_FRONT_FACE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7355,7 +7361,7 @@ radv_CmdSetPrimitiveTopology(VkCommandBuffer commandBuffer, VkPrimitiveTopology
if (radv_primitive_topology_is_line_list(state->dynamic.vk.ia.primitive_topology) !=
radv_primitive_topology_is_line_list(primitive_topology))
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_LINE_STIPPLE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_LINE_STIPPLE;
if (radv_prim_is_points_or_lines(state->dynamic.vk.ia.primitive_topology) !=
radv_prim_is_points_or_lines(primitive_topology))
@ -7363,7 +7369,7 @@ radv_CmdSetPrimitiveTopology(VkCommandBuffer commandBuffer, VkPrimitiveTopology
state->dynamic.vk.ia.primitive_topology = primitive_topology;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_PRIMITIVE_TOPOLOGY;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_PRIMITIVE_TOPOLOGY;
}
VKAPI_ATTR void VKAPI_CALL
@ -7387,7 +7393,7 @@ radv_CmdSetDepthTestEnable(VkCommandBuffer commandBuffer, VkBool32 depthTestEnab
state->dynamic.vk.ds.depth.test_enable = depthTestEnable;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_TEST_ENABLE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_TEST_ENABLE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7398,7 +7404,7 @@ radv_CmdSetDepthWriteEnable(VkCommandBuffer commandBuffer, VkBool32 depthWriteEn
state->dynamic.vk.ds.depth.write_enable = depthWriteEnable;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_WRITE_ENABLE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_WRITE_ENABLE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7409,7 +7415,7 @@ radv_CmdSetDepthCompareOp(VkCommandBuffer commandBuffer, VkCompareOp depthCompar
state->dynamic.vk.ds.depth.compare_op = depthCompareOp;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_COMPARE_OP;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_COMPARE_OP;
}
VKAPI_ATTR void VKAPI_CALL
@ -7420,7 +7426,7 @@ radv_CmdSetDepthBoundsTestEnable(VkCommandBuffer commandBuffer, VkBool32 depthBo
state->dynamic.vk.ds.depth.bounds_test.enable = depthBoundsTestEnable;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS_TEST_ENABLE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS_TEST_ENABLE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7431,7 +7437,7 @@ radv_CmdSetStencilTestEnable(VkCommandBuffer commandBuffer, VkBool32 stencilTest
state->dynamic.vk.ds.stencil.test_enable = stencilTestEnable;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_STENCIL_TEST_ENABLE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_STENCIL_TEST_ENABLE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7455,7 +7461,7 @@ radv_CmdSetStencilOp(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask,
state->dynamic.vk.ds.stencil.back.op.compare = compareOp;
}
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_STENCIL_OP;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_STENCIL_OP;
}
VKAPI_ATTR void VKAPI_CALL
@ -7469,7 +7475,7 @@ radv_CmdSetFragmentShadingRateKHR(VkCommandBuffer commandBuffer, const VkExtent2
for (unsigned i = 0; i < 2; i++)
state->dynamic.vk.fsr.combiner_ops[i] = combinerOps[i];
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_FRAGMENT_SHADING_RATE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_FRAGMENT_SHADING_RATE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7480,7 +7486,7 @@ radv_CmdSetDepthBiasEnable(VkCommandBuffer commandBuffer, VkBool32 depthBiasEnab
state->dynamic.vk.rs.depth_bias.enable = depthBiasEnable;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS_ENABLE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS_ENABLE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7491,7 +7497,7 @@ radv_CmdSetPrimitiveRestartEnable(VkCommandBuffer commandBuffer, VkBool32 primit
state->dynamic.vk.ia.primitive_restart_enable = primitiveRestartEnable;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_PRIMITIVE_RESTART_ENABLE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_PRIMITIVE_RESTART_ENABLE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7502,7 +7508,7 @@ radv_CmdSetRasterizerDiscardEnable(VkCommandBuffer commandBuffer, VkBool32 raste
state->dynamic.vk.rs.rasterizer_discard_enable = rasterizerDiscardEnable;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_RASTERIZER_DISCARD_ENABLE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_RASTERIZER_DISCARD_ENABLE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7513,7 +7519,7 @@ radv_CmdSetPatchControlPointsEXT(VkCommandBuffer commandBuffer, uint32_t patchCo
state->dynamic.vk.ts.patch_control_points = patchControlPoints;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_PATCH_CONTROL_POINTS;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_PATCH_CONTROL_POINTS;
}
VKAPI_ATTR void VKAPI_CALL
@ -7525,7 +7531,7 @@ radv_CmdSetLogicOpEXT(VkCommandBuffer commandBuffer, VkLogicOp logicOp)
state->dynamic.vk.cb.logic_op = logic_op;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_LOGIC_OP;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_LOGIC_OP;
}
VKAPI_ATTR void VKAPI_CALL
@ -7546,7 +7552,7 @@ radv_CmdSetColorWriteEnableEXT(VkCommandBuffer commandBuffer, uint32_t attachmen
state->dynamic.vk.cb.color_write_enables = color_write_enable;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_COLOR_WRITE_ENABLE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_COLOR_WRITE_ENABLE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7628,7 +7634,8 @@ radv_CmdSetVertexInputEXT(VkCommandBuffer commandBuffer, uint32_t vertexBindingD
}
}
state->dirty |= RADV_CMD_DIRTY_VERTEX_BUFFER | RADV_CMD_DIRTY_DYNAMIC_VERTEX_INPUT;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_VERTEX_INPUT;
state->dirty |= RADV_CMD_DIRTY_VERTEX_BUFFER;
}
VKAPI_ATTR void VKAPI_CALL
@ -7644,7 +7651,7 @@ radv_CmdSetPolygonModeEXT(VkCommandBuffer commandBuffer, VkPolygonMode polygonMo
state->dynamic.vk.rs.polygon_mode = polygon_mode;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_POLYGON_MODE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_POLYGON_MODE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7655,7 +7662,7 @@ radv_CmdSetTessellationDomainOriginEXT(VkCommandBuffer commandBuffer, VkTessella
state->dynamic.vk.ts.domain_origin = domainOrigin;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_TESS_DOMAIN_ORIGIN;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_TESS_DOMAIN_ORIGIN;
}
VKAPI_ATTR void VKAPI_CALL
@ -7666,7 +7673,7 @@ radv_CmdSetLogicOpEnableEXT(VkCommandBuffer commandBuffer, VkBool32 logicOpEnabl
state->dynamic.vk.cb.logic_op_enable = logicOpEnable;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_LOGIC_OP_ENABLE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_LOGIC_OP_ENABLE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7677,7 +7684,7 @@ radv_CmdSetLineStippleEnableEXT(VkCommandBuffer commandBuffer, VkBool32 stippled
state->dynamic.vk.rs.line.stipple.enable = stippledLineEnable;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_LINE_STIPPLE_ENABLE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_LINE_STIPPLE_ENABLE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7688,7 +7695,7 @@ radv_CmdSetAlphaToCoverageEnableEXT(VkCommandBuffer commandBuffer, VkBool32 alph
state->dynamic.vk.ms.alpha_to_coverage_enable = alphaToCoverageEnable;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_ALPHA_TO_COVERAGE_ENABLE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_ALPHA_TO_COVERAGE_ENABLE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7699,7 +7706,7 @@ radv_CmdSetAlphaToOneEnableEXT(VkCommandBuffer commandBuffer, VkBool32 alphaToOn
state->dynamic.vk.ms.alpha_to_one_enable = alphaToOneEnable;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_ALPHA_TO_ONE_ENABLE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_ALPHA_TO_ONE_ENABLE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7710,7 +7717,7 @@ radv_CmdSetSampleMaskEXT(VkCommandBuffer commandBuffer, VkSampleCountFlagBits sa
state->dynamic.vk.ms.sample_mask = pSampleMask[0] & 0xffff;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_SAMPLE_MASK;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_SAMPLE_MASK;
}
VKAPI_ATTR void VKAPI_CALL
@ -7721,7 +7728,7 @@ radv_CmdSetDepthClipEnableEXT(VkCommandBuffer commandBuffer, VkBool32 depthClipE
state->dynamic.vk.rs.depth_clip_enable = depthClipEnable;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_CLIP_ENABLE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_CLIP_ENABLE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7733,7 +7740,7 @@ radv_CmdSetConservativeRasterizationModeEXT(VkCommandBuffer commandBuffer,
state->dynamic.vk.rs.conservative_mode = conservativeRasterizationMode;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_CONSERVATIVE_RAST_MODE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_CONSERVATIVE_RAST_MODE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7744,7 +7751,7 @@ radv_CmdSetDepthClipNegativeOneToOneEXT(VkCommandBuffer commandBuffer, VkBool32
state->dynamic.vk.vp.depth_clip_negative_one_to_one = negativeOneToOne;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_CLIP_NEGATIVE_ONE_TO_ONE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_CLIP_NEGATIVE_ONE_TO_ONE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7755,7 +7762,7 @@ radv_CmdSetProvokingVertexModeEXT(VkCommandBuffer commandBuffer, VkProvokingVert
state->dynamic.vk.rs.provoking_vertex = provokingVertexMode;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_PROVOKING_VERTEX_MODE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_PROVOKING_VERTEX_MODE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7766,7 +7773,7 @@ radv_CmdSetDepthClampEnableEXT(VkCommandBuffer commandBuffer, VkBool32 depthClam
state->dynamic.vk.rs.depth_clamp_enable = depthClampEnable;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_CLAMP_ENABLE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_CLAMP_ENABLE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7786,7 +7793,7 @@ radv_CmdSetColorWriteMaskEXT(VkCommandBuffer commandBuffer, uint32_t firstAttach
state->dynamic.vk.cb.attachments[idx].write_mask = pColorWriteMasks[i];
}
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_COLOR_WRITE_MASK;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_COLOR_WRITE_MASK;
if (pdev->info.rbplus_allowed)
state->dirty |= RADV_CMD_DIRTY_RBPLUS;
@ -7807,7 +7814,7 @@ radv_CmdSetColorBlendEnableEXT(VkCommandBuffer commandBuffer, uint32_t firstAtta
state->dynamic.vk.cb.attachments[idx].blend_enable = pColorBlendEnables[i];
}
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_COLOR_BLEND_ENABLE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_COLOR_BLEND_ENABLE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7818,7 +7825,7 @@ radv_CmdSetRasterizationSamplesEXT(VkCommandBuffer commandBuffer, VkSampleCountF
state->dynamic.vk.ms.rasterization_samples = rasterizationSamples;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES;
}
VKAPI_ATTR void VKAPI_CALL
@ -7829,7 +7836,7 @@ radv_CmdSetLineRasterizationModeEXT(VkCommandBuffer commandBuffer, VkLineRasteri
state->dynamic.vk.rs.line.mode = lineRasterizationMode;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_LINE_RASTERIZATION_MODE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_LINE_RASTERIZATION_MODE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7851,7 +7858,7 @@ radv_CmdSetColorBlendEquationEXT(VkCommandBuffer commandBuffer, uint32_t firstAt
state->dynamic.vk.cb.attachments[idx].alpha_blend_op = pColorBlendEquations[i].alphaBlendOp;
}
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_COLOR_BLEND_EQUATION;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_COLOR_BLEND_EQUATION;
}
VKAPI_ATTR void VKAPI_CALL
@ -7862,7 +7869,7 @@ radv_CmdSetSampleLocationsEnableEXT(VkCommandBuffer commandBuffer, VkBool32 samp
state->dynamic.vk.ms.sample_locations_enable = sampleLocationsEnable;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_SAMPLE_LOCATIONS_ENABLE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_SAMPLE_LOCATIONS_ENABLE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7874,7 +7881,7 @@ radv_CmdSetDiscardRectangleEnableEXT(VkCommandBuffer commandBuffer, VkBool32 dis
state->dynamic.vk.dr.enable = discardRectangleEnable;
state->dynamic.vk.dr.rectangle_count = discardRectangleEnable ? MAX_DISCARD_RECTANGLES : 0;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_DISCARD_RECTANGLE_ENABLE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_DISCARD_RECTANGLE_ENABLE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7885,7 +7892,7 @@ radv_CmdSetDiscardRectangleModeEXT(VkCommandBuffer commandBuffer, VkDiscardRecta
state->dynamic.vk.dr.mode = discardRectangleMode;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_DISCARD_RECTANGLE_MODE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_DISCARD_RECTANGLE_MODE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7896,7 +7903,7 @@ radv_CmdSetAttachmentFeedbackLoopEnableEXT(VkCommandBuffer commandBuffer, VkImag
state->dynamic.feedback_loop_aspects = aspectMask;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_ATTACHMENT_FEEDBACK_LOOP_ENABLE;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_ATTACHMENT_FEEDBACK_LOOP_ENABLE;
}
VKAPI_ATTR void VKAPI_CALL
@ -7914,7 +7921,7 @@ radv_CmdSetDepthBias2EXT(VkCommandBuffer commandBuffer, const VkDepthBiasInfoEXT
state->dynamic.vk.rs.depth_bias.representation =
dbr_info ? dbr_info->depthBiasRepresentation : VK_DEPTH_BIAS_REPRESENTATION_LEAST_REPRESENTABLE_VALUE_FORMAT_EXT;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS;
state->dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS;
}
VKAPI_ATTR void VKAPI_CALL
@ -8065,8 +8072,9 @@ radv_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCou
/* After executing commands from secondary buffers we have to dirty
* some states.
*/
primary->state.dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_ALL;
primary->state.dirty |= RADV_CMD_DIRTY_PIPELINE | RADV_CMD_DIRTY_INDEX_BUFFER | RADV_CMD_DIRTY_GUARDBAND |
RADV_CMD_DIRTY_DYNAMIC_ALL | RADV_CMD_DIRTY_SHADER_QUERY | RADV_CMD_DIRTY_OCCLUSION_QUERY |
RADV_CMD_DIRTY_SHADER_QUERY | RADV_CMD_DIRTY_OCCLUSION_QUERY |
RADV_CMD_DIRTY_DB_SHADER_CONTROL | RADV_CMD_DIRTY_COLOR_OUTPUT;
radv_mark_descriptor_sets_dirty(primary, VK_PIPELINE_BIND_POINT_GRAPHICS);
radv_mark_descriptor_sets_dirty(primary, VK_PIPELINE_BIND_POINT_COMPUTE);
@ -8275,7 +8283,7 @@ radv_CmdBeginRendering(VkCommandBuffer commandBuffer, const VkRenderingInfo *pRe
if (pdev->info.rbplus_allowed)
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_RBPLUS;
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS | RADV_CMD_DIRTY_DYNAMIC_STENCIL_TEST_ENABLE;
cmd_buffer->state.dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS | RADV_CMD_DIRTY_DYNAMIC_STENCIL_TEST_ENABLE;
if (render->vrs_att.iview && pdev->info.gfx_level == GFX10_3) {
if (render->ds_att.iview &&
@ -9191,13 +9199,18 @@ radv_need_late_scissor_emission(struct radv_cmd_buffer *cmd_buffer, const struct
if (cmd_buffer->state.context_roll_without_scissor_emitted || info->strmout_buffer)
return true;
uint64_t used_states = radv_get_needed_dynamic_states(cmd_buffer) | ~RADV_CMD_DIRTY_DYNAMIC_ALL;
uint64_t used_dynamic_states = radv_get_needed_dynamic_states(cmd_buffer);
used_dynamic_states &= ~RADV_CMD_DIRTY_DYNAMIC_VERTEX_INPUT;
if (cmd_buffer->state.dirty_dynamic & used_dynamic_states)
return true;
/* Index, vertex and streamout buffers don't change context regs.
* We assume that any other dirty flag causes context rolls.
*/
used_states &= ~(RADV_CMD_DIRTY_INDEX_BUFFER | RADV_CMD_DIRTY_VERTEX_BUFFER | RADV_CMD_DIRTY_DYNAMIC_VERTEX_INPUT |
RADV_CMD_DIRTY_STREAMOUT_BUFFER);
uint64_t used_states = ~RADV_CMD_DIRTY_ALL;
used_states &= ~(RADV_CMD_DIRTY_INDEX_BUFFER | RADV_CMD_DIRTY_VERTEX_BUFFER | RADV_CMD_DIRTY_STREAMOUT_BUFFER);
return cmd_buffer->state.dirty & used_states;
}
@ -9276,8 +9289,9 @@ radv_emit_ngg_culling_state(struct radv_cmd_buffer *cmd_buffer)
/* Get current culling settings. */
uint32_t nggc_settings = radv_get_ngg_culling_settings(cmd_buffer, vp_y_inverted);
if (cmd_buffer->state.dirty &
(RADV_CMD_DIRTY_PIPELINE | RADV_CMD_DIRTY_DYNAMIC_VIEWPORT | RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES)) {
if ((cmd_buffer->state.dirty & RADV_CMD_DIRTY_PIPELINE) ||
(cmd_buffer->state.dirty_dynamic &
(RADV_CMD_DIRTY_DYNAMIC_VIEWPORT | RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES))) {
/* Correction for inverted Y */
if (vp_y_inverted) {
vp_scale[1] = -vp_scale[1];
@ -9540,11 +9554,11 @@ radv_emit_all_graphics_states(struct radv_cmd_buffer *cmd_buffer, const struct r
if (cmd_buffer->state.shaders[MESA_SHADER_FRAGMENT] &&
cmd_buffer->state.shaders[MESA_SHADER_FRAGMENT]->info.has_epilog) {
if ((cmd_buffer->state.emitted_graphics_pipeline != cmd_buffer->state.graphics_pipeline ||
(cmd_buffer->state.dirty &
(RADV_CMD_DIRTY_DYNAMIC_COLOR_WRITE_MASK | RADV_CMD_DIRTY_DYNAMIC_COLOR_BLEND_ENABLE |
RADV_CMD_DIRTY_DYNAMIC_ALPHA_TO_COVERAGE_ENABLE | RADV_CMD_DIRTY_DYNAMIC_COLOR_BLEND_EQUATION |
RADV_CMD_DIRTY_DYNAMIC_ALPHA_TO_ONE_ENABLE | RADV_CMD_DIRTY_GRAPHICS_SHADERS |
RADV_CMD_DIRTY_FRAMEBUFFER)))) {
((cmd_buffer->state.dirty & (RADV_CMD_DIRTY_GRAPHICS_SHADERS | RADV_CMD_DIRTY_FRAMEBUFFER)) ||
(cmd_buffer->state.dirty_dynamic &
(RADV_CMD_DIRTY_DYNAMIC_COLOR_WRITE_MASK | RADV_CMD_DIRTY_DYNAMIC_COLOR_BLEND_ENABLE |
RADV_CMD_DIRTY_DYNAMIC_ALPHA_TO_COVERAGE_ENABLE | RADV_CMD_DIRTY_DYNAMIC_COLOR_BLEND_EQUATION |
RADV_CMD_DIRTY_DYNAMIC_ALPHA_TO_ONE_ENABLE))))) {
ps_epilog = lookup_ps_epilog(cmd_buffer);
if (!ps_epilog) {
vk_command_buffer_set_error(&cmd_buffer->vk, VK_ERROR_OUT_OF_HOST_MEMORY);
@ -9587,21 +9601,24 @@ radv_emit_all_graphics_states(struct radv_cmd_buffer *cmd_buffer, const struct r
if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_SHADER_QUERY)
radv_flush_shader_query_state(cmd_buffer);
if (cmd_buffer->state.dirty & (RADV_CMD_DIRTY_OCCLUSION_QUERY | RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES |
RADV_CMD_DIRTY_DYNAMIC_PRIMITIVE_TOPOLOGY))
if ((cmd_buffer->state.dirty & RADV_CMD_DIRTY_OCCLUSION_QUERY) ||
(cmd_buffer->state.dirty_dynamic &
(RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES | RADV_CMD_DIRTY_DYNAMIC_PRIMITIVE_TOPOLOGY)))
radv_flush_occlusion_query_state(cmd_buffer);
if ((cmd_buffer->state.dirty &
(RADV_CMD_DIRTY_PIPELINE | RADV_CMD_DIRTY_DYNAMIC_CULL_MODE | RADV_CMD_DIRTY_DYNAMIC_FRONT_FACE |
RADV_CMD_DIRTY_DYNAMIC_RASTERIZER_DISCARD_ENABLE | RADV_CMD_DIRTY_DYNAMIC_VIEWPORT |
RADV_CMD_DIRTY_DYNAMIC_CONSERVATIVE_RAST_MODE | RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES |
RADV_CMD_DIRTY_DYNAMIC_PRIMITIVE_TOPOLOGY | RADV_CMD_DIRTY_DYNAMIC_SAMPLE_LOCATIONS_ENABLE)) &&
if (((cmd_buffer->state.dirty & RADV_CMD_DIRTY_PIPELINE) ||
(cmd_buffer->state.dirty_dynamic &
(RADV_CMD_DIRTY_DYNAMIC_CULL_MODE | RADV_CMD_DIRTY_DYNAMIC_FRONT_FACE |
RADV_CMD_DIRTY_DYNAMIC_RASTERIZER_DISCARD_ENABLE | RADV_CMD_DIRTY_DYNAMIC_VIEWPORT |
RADV_CMD_DIRTY_DYNAMIC_CONSERVATIVE_RAST_MODE | RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES |
RADV_CMD_DIRTY_DYNAMIC_PRIMITIVE_TOPOLOGY | RADV_CMD_DIRTY_DYNAMIC_SAMPLE_LOCATIONS_ENABLE))) &&
cmd_buffer->state.has_nggc)
radv_emit_ngg_culling_state(cmd_buffer);
if (cmd_buffer->state.dirty &
(RADV_CMD_DIRTY_FRAMEBUFFER | RADV_CMD_DIRTY_DYNAMIC_COLOR_WRITE_MASK |
RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES | RADV_CMD_DIRTY_DYNAMIC_LINE_RASTERIZATION_MODE))
if ((cmd_buffer->state.dirty & RADV_CMD_DIRTY_FRAMEBUFFER) ||
(cmd_buffer->state.dirty_dynamic &
(RADV_CMD_DIRTY_DYNAMIC_COLOR_WRITE_MASK | RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES |
RADV_CMD_DIRTY_DYNAMIC_LINE_RASTERIZATION_MODE)))
radv_emit_binning_state(cmd_buffer);
if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_PIPELINE) {
@ -9622,10 +9639,11 @@ radv_emit_all_graphics_states(struct radv_cmd_buffer *cmd_buffer, const struct r
if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_GUARDBAND)
radv_emit_guardband_state(cmd_buffer);
if (cmd_buffer->state.dirty &
(RADV_CMD_DIRTY_DB_SHADER_CONTROL | RADV_CMD_DIRTY_DYNAMIC_COLOR_WRITE_MASK |
RADV_CMD_DIRTY_DYNAMIC_COLOR_BLEND_ENABLE | RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES |
RADV_CMD_DIRTY_DYNAMIC_LINE_RASTERIZATION_MODE | RADV_CMD_DIRTY_DYNAMIC_ATTACHMENT_FEEDBACK_LOOP_ENABLE))
if ((cmd_buffer->state.dirty & RADV_CMD_DIRTY_DB_SHADER_CONTROL) ||
(cmd_buffer->state.dirty_dynamic &
(RADV_CMD_DIRTY_DYNAMIC_COLOR_WRITE_MASK | RADV_CMD_DIRTY_DYNAMIC_COLOR_BLEND_ENABLE |
RADV_CMD_DIRTY_DYNAMIC_RASTERIZATION_SAMPLES | RADV_CMD_DIRTY_DYNAMIC_LINE_RASTERIZATION_MODE |
RADV_CMD_DIRTY_DYNAMIC_ATTACHMENT_FEEDBACK_LOOP_ENABLE)))
radv_emit_db_shader_control(cmd_buffer);
if (info->indexed && info->indirect && cmd_buffer->state.dirty & RADV_CMD_DIRTY_INDEX_BUFFER)
@ -9634,7 +9652,7 @@ radv_emit_all_graphics_states(struct radv_cmd_buffer *cmd_buffer, const struct r
if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_STREAMOUT_ENABLE)
radv_emit_streamout_enable_state(cmd_buffer);
const uint64_t dynamic_states = cmd_buffer->state.dirty & radv_get_needed_dynamic_states(cmd_buffer);
const uint64_t dynamic_states = cmd_buffer->state.dirty_dynamic & radv_get_needed_dynamic_states(cmd_buffer);
if (dynamic_states) {
radv_cmd_buffer_flush_dynamic_state(cmd_buffer, dynamic_states);
@ -9741,7 +9759,7 @@ radv_bind_graphics_shaders(struct radv_cmd_buffer *cmd_buffer)
/* Re-emit the VS prolog when a new vertex shader is bound. */
if (vs->info.vs.has_prolog) {
cmd_buffer->state.emitted_vs_prolog = NULL;
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_VERTEX_INPUT;
cmd_buffer->state.dirty_dynamic |= RADV_CMD_DIRTY_DYNAMIC_VERTEX_INPUT;
}
/* Re-emit the vertex buffer descriptors because they are really tied to the pipeline. */

35
src/amd/vulkan/radv_cmd_buffer.h
View file

@ -77,7 +77,7 @@ enum radv_dynamic_state_bits {
RADV_DYNAMIC_ALL = (1ull << 51) - 1,
};
enum radv_cmd_dirty_bits {
enum radv_cmd_dirty_dynamic_bits {
/* Keep the dynamic state dirty bits in sync with
* enum radv_dynamic_state_bits */
RADV_CMD_DIRTY_DYNAMIC_VIEWPORT = 1ull << 0,
@ -132,19 +132,23 @@ enum radv_cmd_dirty_bits {
RADV_CMD_DIRTY_DYNAMIC_SAMPLE_LOCATIONS_ENABLE = 1ull << 49,
RADV_CMD_DIRTY_DYNAMIC_ALPHA_TO_ONE_ENABLE = 1ull << 50,
RADV_CMD_DIRTY_DYNAMIC_ALL = (1ull << 51) - 1,
RADV_CMD_DIRTY_PIPELINE = 1ull << 51,
RADV_CMD_DIRTY_INDEX_BUFFER = 1ull << 52,
RADV_CMD_DIRTY_FRAMEBUFFER = 1ull << 53,
RADV_CMD_DIRTY_VERTEX_BUFFER = 1ull << 54,
RADV_CMD_DIRTY_STREAMOUT_BUFFER = 1ull << 55,
RADV_CMD_DIRTY_GUARDBAND = 1ull << 56,
RADV_CMD_DIRTY_RBPLUS = 1ull << 57,
RADV_CMD_DIRTY_SHADER_QUERY = 1ull << 58,
RADV_CMD_DIRTY_OCCLUSION_QUERY = 1ull << 59,
RADV_CMD_DIRTY_DB_SHADER_CONTROL = 1ull << 60,
RADV_CMD_DIRTY_STREAMOUT_ENABLE = 1ull << 61,
RADV_CMD_DIRTY_GRAPHICS_SHADERS = 1ull << 62,
RADV_CMD_DIRTY_COLOR_OUTPUT = 1ull << 63,
};
enum radv_cmd_dirty_bits {
RADV_CMD_DIRTY_PIPELINE = 1ull << 0,
RADV_CMD_DIRTY_INDEX_BUFFER = 1ull << 1,
RADV_CMD_DIRTY_FRAMEBUFFER = 1ull << 2,
RADV_CMD_DIRTY_VERTEX_BUFFER = 1ull << 3,
RADV_CMD_DIRTY_STREAMOUT_BUFFER = 1ull << 4,
RADV_CMD_DIRTY_GUARDBAND = 1ull << 5,
RADV_CMD_DIRTY_RBPLUS = 1ull << 6,
RADV_CMD_DIRTY_SHADER_QUERY = 1ull << 7,
RADV_CMD_DIRTY_OCCLUSION_QUERY = 1ull << 8,
RADV_CMD_DIRTY_DB_SHADER_CONTROL = 1ull << 9,
RADV_CMD_DIRTY_STREAMOUT_ENABLE = 1ull << 10,
RADV_CMD_DIRTY_GRAPHICS_SHADERS = 1ull << 11,
RADV_CMD_DIRTY_COLOR_OUTPUT = 1ull << 12,
RADV_CMD_DIRTY_ALL = (1ull << 13) - 1,
};
enum radv_cmd_flush_bits {
@ -290,7 +294,8 @@ struct radv_cmd_state {
unsigned vb_size;
bool predicating;
uint64_t dirty;
uint64_t dirty_dynamic;
uint32_t dirty;
VkShaderStageFlags active_stages;
struct radv_shader *shaders[MESA_VULKAN_SHADER_STAGES];