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ac/vcn: Rename VCN5 swizzle mode to GFX12

Browse source 
The original naming is inaccurate, it depends on the GFX version, not
VCN.

Signed-off-by: Suresh Guttula <suresh.guttula@amd.com>
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41202>
This commit is contained in:
Benjamin Cheng 2026-04-14 08:29:06 -04:00 • committed by Suresh Guttula
parent acba4c9fd8
commit 922d04c9a5
4 changed files with 5 additions and 5 deletions
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4
src/amd/common/ac_parse_ib.c
View file

@ -1868,8 +1868,8 @@ static void parse_vcn_enc_ib(FILE *f, struct ac_ib_parser *ib, uint32_t num_dw)
uint32_t swizzle = ac_ib_get(ib);
fprintf(f, " swizzle mode = %s\n",
swizzle == RENCODE_REC_SWIZZLE_MODE_LINEAR ? "LINEAR" :
(ib->vcn_version < VCN_5_0_0 && swizzle == RENCODE_REC_SWIZZLE_MODE_256B_D) ||
(ib->vcn_version >= VCN_5_0_0 && swizzle == RENCODE_REC_SWIZZLE_MODE_256B_D_VCN5) ? "256B D" :
(ib->gfx_level < GFX12 && swizzle == RENCODE_REC_SWIZZLE_MODE_256B_D) ||
(ib->gfx_level >= GFX12 && swizzle == RENCODE_REC_SWIZZLE_MODE_256B_D_GFX12) ? "256B D" :
swizzle == RENCODE_REC_SWIZZLE_MODE_256B_S ? "256B S" :
swizzle == RENCODE_REC_SWIZZLE_MODE_8x8_1D_THIN_12_24BPP ? "8x8 1D THIN 12 24BPP" :
"???");

2
src/amd/common/ac_vcn_enc.h
View file

@ -201,7 +201,7 @@
#define RENCODE_REC_SWIZZLE_MODE_256B_D 2
#define RENCODE_REC_SWIZZLE_MODE_8x8_1D_THIN_12_24BPP 0x10000001
#define RENCODE_REC_SWIZZLE_MODE_8x8_1D_THIN_12_24BPP_VCN4 0x10000000
#define RENCODE_REC_SWIZZLE_MODE_256B_D_VCN5 1
#define RENCODE_REC_SWIZZLE_MODE_256B_D_GFX12 1
#define RENCODE_VIDEO_BITSTREAM_BUFFER_MODE_LINEAR 0
#define RENCODE_VIDEO_BITSTREAM_BUFFER_MODE_CIRCULAR 1

2
src/amd/vulkan/radv_video_enc.c
View file

@ -1816,7 +1816,7 @@ radv_enc_ctx2(struct radv_cmd_buffer *cmd_buffer, const VkVideoEncodeInfoKHR *in
RADEON_ENC_CS(0);
RADEON_ENC_CS(0);
RADEON_ENC_CS(0);
RADEON_ENC_CS(RENCODE_REC_SWIZZLE_MODE_256B_D_VCN5);
RADEON_ENC_CS(RENCODE_REC_SWIZZLE_MODE_256B_D_GFX12);
RADEON_ENC_CS(fcb_va >> 32);
RADEON_ENC_CS(fcb_va & 0xffffffff);
RADEON_ENC_CS(RENCODE_MAX_METADATA_BUFFER_SIZE_PER_FRAME); // colloc/cdf offset

2
src/gallium/drivers/radeonsi/radeon_vcn_enc_5_0.c
View file

@ -168,7 +168,7 @@ static void radeon_enc_spec_misc_av1(struct radeon_encoder *enc)
static uint32_t radeon_enc_ref_swizzle_mode(struct radeon_encoder *enc)
{
/* return RENCODE_REC_SWIZZLE_MODE_LINEAR; for debugging purpose */
return RENCODE_REC_SWIZZLE_MODE_256B_D_VCN5;
return RENCODE_REC_SWIZZLE_MODE_256B_D_GFX12;
}
static void radeon_enc_ctx(struct radeon_encoder *enc)