From 91cf0a6e6d2dc522bc3e5b2c726d455669b88afc Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Wed, 20 May 2026 10:08:20 +0200 Subject: [PATCH] radv: use the new generation script for drirc Signed-off-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/meson.build | 15 ++- src/amd/vulkan/radv_drirc_gen.py | 193 +++++++++++++++++++++++++++++++ src/amd/vulkan/radv_instance.c | 161 ++------------------------ src/amd/vulkan/radv_instance.h | 58 +--------- src/util/driconf.h | 151 ------------------------ 5 files changed, 216 insertions(+), 362 deletions(-) create mode 100644 src/amd/vulkan/radv_drirc_gen.py diff --git a/src/amd/vulkan/meson.build b/src/amd/vulkan/meson.build index d2f43494cd7..195e1a3a0c9 100644 --- a/src/amd/vulkan/meson.build +++ b/src/amd/vulkan/meson.build @@ -29,6 +29,19 @@ radv_entrypoints = custom_target( depend_files : vk_entrypoints_gen_depend_files, ) +radv_drirc = custom_target( + 'radv_drirc', + input : files('radv_drirc_gen.py'), + output : ['radv_drirc.c', 'radv_drirc.h'], + command : [ + prog_python, '@INPUT@', + '--import-path', join_paths(dir_source_root, 'src/util'), + '--drirc-src', '@OUTPUT0@', + '--drirc-hdr', '@OUTPUT1@', + ], + depend_files : files(join_paths(dir_source_root, 'src/util/drirc_gen.py')), +) + libradv_files = files( 'bvh/bvh.h', 'layers/radv_app_workarounds.c', @@ -235,7 +248,7 @@ endif libvulkan_radeon = shared_library( 'vulkan_radeon', - [libradv_files, radv_entrypoints, sha1_h, radix_sort_spv, bvh_spv, radv_annotate_layer], + [libradv_files, radv_entrypoints, radv_drirc, sha1_h, radix_sort_spv, bvh_spv, radv_annotate_layer], vs_module_defs : vulkan_api_def, include_directories : [ inc_include, inc_src, inc_amd, inc_amd_common, inc_amd_common_llvm, diff --git a/src/amd/vulkan/radv_drirc_gen.py b/src/amd/vulkan/radv_drirc_gen.py new file mode 100644 index 00000000000..1ff4be30143 --- /dev/null +++ b/src/amd/vulkan/radv_drirc_gen.py @@ -0,0 +1,193 @@ +#!/usr/bin/env python3 +# Copyright © 2026 Valve Corporation +# SPDX-License-Identifier: MIT + +import argparse +import sys + +def declare_options(): + from drirc_gen import DrircBool as B + from drirc_gen import DrircInt as I + from drirc_gen import DrircString as S + + from drirc_gen import DrircSection as Section + + debug_options = [ + # WSI options. + B("vk_wsi_force_bgra8_unorm_first", False, + "Force vkGetPhysicalDeviceSurfaceFormatsKHR to return VK_FORMAT_B8G8R8A8_UNORM as the first format"), + B("vk_wsi_force_swapchain_to_current_extent", False, + "Force VkSwapchainCreateInfoKHR::imageExtent to be VkSurfaceCapabilities2KHR::currentExtent"), + B("vk_wsi_disable_unordered_submits", False, + "Disable unordered WSI submits to workaround application synchronization bugs"), + B("vk_x11_ignore_suboptimal", False, + "Force the X11 WSI to never report VK_SUBOPTIMAL_KHR"), + + B("radv_disable_aniso_single_level", False, + "Disable anisotropic filtering for single level images", + c_name="disable_aniso_single_level"), + B("radv_disable_dcc", False, + "Disable DCC for color images on GFX8-GFX11.5", + c_name="disable_dcc"), + B("radv_disable_dcc_mips", False, + "Disable DCC for color images with mips on GFX8-GFX11.5", + c_name="disable_dcc_mips"), + B("radv_disable_dcc_stores", False, + "Disable DCC for color storage images on GFX10-GFX11.5", + c_name="disable_dcc_stores"), + B("radv_disable_shrink_image_store", False, + "Disabling shrinking of image stores based on the format", + c_name="disable_shrink_image_store"), + B("radv_disable_sinking_load_input_fs", False, + "Disable sinking load inputs for fragment shaders", + c_name="disable_sinking_load_input_fs"), + B("radv_disable_tc_compat_htile_general", False, + "Disable TC-compat HTILE in GENERAL layout", + c_name="disable_tc_compat_htile_general"), + B("radv_disable_trunc_coord", False, + "Disable TRUNC_COORD to use D3D10/11/12 point sampling behaviour. This has special behaviour for DXVK.", + c_name="disable_trunc_coord"), + B("radv_enable_mrt_output_nan_fixup", False, + "Replace NaN outputs from fragment shaders with zeroes for floating point render target", + c_name="enable_mrt_output_nan_fixup"), + B("radv_flush_before_query_copy", False, + "Wait for timestamps to be written before a query copy command", + c_name="flush_before_query_copy"), + B("radv_flush_before_timestamp_write", False, + "Wait for previous commands to finish before writing timestamps", + c_name="flush_before_timestamp_write"), + B("radv_invariant_geom", False, + "Mark geometry-affecting outputs as invariant", + c_name="invariant_geom"), + B("vk_lower_terminate_to_discard", False, + "Lower terminate to discard (which is implicitly demote)", + c_name="lower_terminate_to_discard"), + B("radv_no_dynamic_bounds", False, + "Disabling bounds checking for dynamic buffer descriptors", + c_name="no_dynamic_bounds"), + B("radv_split_fma", False, + "Split application-provided fused multiply-add in geometry stages", + c_name="split_fma"), + B("radv_ssbo_non_uniform", False, + "Always mark SSBO operations as non-uniform.", + c_name="ssbo_non_uniform"), + B("radv_tex_non_uniform", False, + "Always mark texture sample operations as non-uniform.", + c_name="tex_non_uniform"), + B("radv_zero_vram", False, + "Initialize to zero all VRAM allocations", + c_name="zero_vram"), + B("radv_wait_for_vm_map_updates", False, + "Wait for VM MAP updates at allocation time to mitigate use-before-alloc", + c_name="wait_for_vm_map_updates"), + B("radv_no_implicit_varying_subgroup_size", False, + "Do not assume VK_PIPELINE_SHADER_STAGE_CREATE_ALLOW_VARYING_SUBGROUP_SIZE for SPIR-V 1.6.", + c_name="no_implicit_varying_subgroup_size"), + B("radv_rt_wave64", False, + "Force wave64 in RT shaders", + c_name="rt_wave64"), + B("radv_hide_rebar_on_dgpu", False, + "Hide resizable bar on dGPUs by exposing a fake carveout of 256MiB.", + c_name="hide_rebar_on_dgpu"), + S("radv_app_layer", + description="Select an application layer.", + c_name="app_layer"), + I("radv_override_uniform_offset_alignment", 0, 0, 128, + "Override the minUniformBufferOffsetAlignment exposed to the application. (0 = default)", + c_name="override_uniform_offset_alignment"), + B("radv_force_64_byte_sampled_image", False, + "Force sampled images size to 64 bytes.", + c_name="force_64_byte_sampled_image"), + ] + + performance_options = [ + # WSI options. + B("adaptive_sync", True, + "Adapt the monitor sync to the application performance (when possible)"), + I("vk_x11_override_min_image_count", 0, 0, 999, + "Override the VkSurfaceCapabilitiesKHR::minImageCount (0 = no override)"), + B("vk_x11_strict_image_count", False, + "Force the X11 WSI to create exactly the number of image specified by the application in VkSwapchainCreateInfoKHR::minImageCount"), + B("vk_x11_ensure_min_image_count", False, + "Force the X11 WSI to create at least the number of image specified by the driver in VkSurfaceCapabilitiesKHR::minImageCount"), + B("vk_xwayland_wait_ready", False, + "Wait for fences before submitting buffers to Xwayland"), + + B("radv_disable_ngg_gs", False, + "Disable NGG GS on GFX10/GFX10.3.", + c_name="disable_ngg_gs"), + B("radv_enable_unified_heap_on_apu", False, + "Enable an unified heap with DEVICE_LOCAL on integrated GPUs", + c_name="enable_unified_heap_on_apu"), + B("radv_report_llvm9_version_string", False, + "Report LLVM 9.0.1 for games that apply shader workarounds if missing (for ACO only)", + c_name="report_llvm9_version_string"), + B("radv_prefer_2d_swizzle_for_3d_storage", False, + "Prefer 2D swizzle mode for 3D storage images.", + c_name="prefer_2d_swizzle_for_3d_storage"), + S("radv_gfx12_hiz_wa", + description="Choose the specific HiZ workaround to apply on GFX12 (RDNA4). Accepted values are: disabled, partial or full", + c_name="gfx12_hiz_wa"), + ] + + features_options = [ + B("radv_cooperative_matrix2_nv", False, + "Expose VK_NV_cooperative_matrix2 on supported hardware.", + c_name="cooperative_matrix2_nv"), + B("radv_emulate_rt", False, + "Expose RT extensions on GFX10 and below through software emulation.", + c_name="emulate_rt"), + B("radv_enable_float16_gfx8", False, + "Expose float16 on GFX8, where it's supported but usually not beneficial.", + c_name="enable_float16_gfx8"), + B("vk_require_etc2", False, + "Implement emulated ETC2 on HW that does not support it", + c_name="require_etc2"), + B("vk_require_astc", False, + "Implement emulated ASTC on HW that does not support it", + c_name="require_astc"), + ] + + misc_options = [ + B("radv_clear_lds", False, + "Clear LDS at the end of shaders. Might decrease performance.", + c_name="clear_lds"), + I("override_vram_size", -1, -1, 2147483647, + "Override the VRAM size advertised to the application in MiB (-1 = default)", + c_name="override_vram_size"), + + # Overrides for forcing re-compilation of pipelines when + # RADV_BUILD_ID_OVERRIDE is enabled. These need to be bumped every + # time a compiler bugfix is backported (up to 8 shader versions are + # supported). + I("radv_override_graphics_shader_version", 0, 0, 7, + "Override the shader version of graphics pipelines to force re-compilation. (0 = default)", + c_name="override_graphics_shader_version"), + I("radv_override_compute_shader_version", 0, 0, 7, + "Override the shader version of compute pipelines to force re-compilation. (0 = default)", + c_name="override_compute_shader_version"), + I("radv_override_ray_tracing_shader_version", 0, 0, 7, + "Override the shader version of ray tracing pipelines to force re-compilation. (0 = default)", + c_name="override_ray_tracing_shader_version"), + ] + + return [ + Section("Debugging", debug_options, c_name="debug"), + Section("Performance", performance_options, c_name="performance"), + Section("Features", features_options, c_name="features"), + Section("Miscellaneous", misc_options, c_name="misc"), + ] + +def main(): + parser = argparse.ArgumentParser() + parser.add_argument('-p', '--import-path', required=True) + parser.add_argument('--drirc-src', required=True) + parser.add_argument('--drirc-hdr', required=True) + args = parser.parse_args() + sys.path.insert(0, args.import_path) + + from drirc_gen import drirc_generate + drirc_generate(args.drirc_src, args.drirc_hdr, "radv", declare_options()) + +if __name__ == '__main__': + main() diff --git a/src/amd/vulkan/radv_instance.c b/src/amd/vulkan/radv_instance.c index 17ed307aea1..5df296ebb39 100644 --- a/src/amd/vulkan/radv_instance.c +++ b/src/amd/vulkan/radv_instance.c @@ -180,170 +180,25 @@ static const struct debug_control trace_options[] = { {NULL, 0}, }; -// clang-format off -static const driOptionDescription radv_dri_options[] = { - DRI_CONF_SECTION_PERFORMANCE - DRI_CONF_ADAPTIVE_SYNC(true) - DRI_CONF_VK_X11_OVERRIDE_MIN_IMAGE_COUNT(0) - DRI_CONF_VK_X11_STRICT_IMAGE_COUNT(false) - DRI_CONF_VK_X11_ENSURE_MIN_IMAGE_COUNT(false) - DRI_CONF_VK_XWAYLAND_WAIT_READY(false) - DRI_CONF_RADV_REPORT_LLVM9_VERSION_STRING(false) - DRI_CONF_RADV_ENABLE_MRT_OUTPUT_NAN_FIXUP(false) - DRI_CONF_RADV_DISABLE_SHRINK_IMAGE_STORE(false) - DRI_CONF_RADV_NO_DYNAMIC_BOUNDS(false) - DRI_CONF_RADV_OVERRIDE_UNIFORM_OFFSET_ALIGNMENT(0) - DRI_CONF_RADV_CLEAR_LDS(false) - DRI_CONF_RADV_DISABLE_NGG_GS(false) - DRI_CONF_RADV_GFX12_HIZ_WA() - DRI_CONF_RADV_PREFER_2D_SWIZZLE_FOR_3D_STORAGE(false) - DRI_CONF_SECTION_END - - DRI_CONF_SECTION_DEBUG - DRI_CONF_OVERRIDE_VRAM_SIZE() - DRI_CONF_VK_LOWER_TERMINATE_TO_DISCARD(false) - DRI_CONF_VK_WSI_FORCE_BGRA8_UNORM_FIRST(false) - DRI_CONF_VK_WSI_FORCE_SWAPCHAIN_TO_CURRENT_EXTENT(false) - DRI_CONF_VK_WSI_DISABLE_UNORDERED_SUBMITS(false) - DRI_CONF_VK_X11_IGNORE_SUBOPTIMAL(false) - DRI_CONF_VK_REQUIRE_ETC2(false) - DRI_CONF_VK_REQUIRE_ASTC(false) - DRI_CONF_RADV_ZERO_VRAM(false) - DRI_CONF_RADV_INVARIANT_GEOM(false) - DRI_CONF_RADV_SPLIT_FMA(false) - DRI_CONF_RADV_DISABLE_TC_COMPAT_HTILE_GENERAL(false) - DRI_CONF_RADV_DISABLE_DCC(false) - DRI_CONF_RADV_DISABLE_DCC_MIPS(false) - DRI_CONF_RADV_DISABLE_DCC_STORES(false) - DRI_CONF_RADV_DISABLE_ANISO_SINGLE_LEVEL(false) - DRI_CONF_RADV_DISABLE_TRUNC_COORD(false) - DRI_CONF_RADV_DISABLE_SINKING_LOAD_INPUT_FS(false) - DRI_CONF_RADV_FLUSH_BEFORE_QUERY_COPY(false) - DRI_CONF_RADV_ENABLE_UNIFIED_HEAP_ON_APU(false) - DRI_CONF_RADV_TEX_NON_UNIFORM(false) - DRI_CONF_RADV_FLUSH_BEFORE_TIMESTAMP_WRITE(false) - DRI_CONF_RADV_RT_WAVE64(false) - DRI_CONF_RADV_OVERRIDE_GRAPHICS_SHADER_VERSION(0) - DRI_CONF_RADV_OVERRIDE_COMPUTE_SHADER_VERSION(0) - DRI_CONF_RADV_OVERRIDE_RAY_TRACING_SHADER_VERSION(0) - DRI_CONF_RADV_SSBO_NON_UNIFORM(false) - DRI_CONF_RADV_APP_LAYER() - DRI_CONF_RADV_EMULATE_RT(false) - DRI_CONF_RADV_ENABLE_FLOAT16_GFX8(false) - DRI_CONF_RADV_COOPERATIVE_MATRIX2_NV(false) - DRI_CONF_RADV_WAIT_FOR_VM_MAP_UPDATES(false) - DRI_CONF_RADV_NO_IMPLICIT_VARYING_SUBGROUP_SIZE(false) - DRI_CONF_RADV_HIDE_REBAR_ON_DGPU(false) - DRI_CONF_RADV_FORCE_64_BYTE_SAMPLED_IMAGE(false) - DRI_CONF_SECTION_END -}; -// clang-format on - static void -radv_init_dri_debug_options(struct radv_instance *instance) +radv_init_dri_options(struct radv_instance *instance) { struct radv_drirc *drirc = &instance->drirc; - drirc->debug.disable_aniso_single_level = driQueryOptionb(&drirc->options, "radv_disable_aniso_single_level"); - drirc->debug.disable_dcc = driQueryOptionb(&drirc->options, "radv_disable_dcc"); - drirc->debug.disable_dcc_mips = driQueryOptionb(&drirc->options, "radv_disable_dcc_mips"); - drirc->debug.disable_dcc_stores = driQueryOptionb(&drirc->options, "radv_disable_dcc_stores"); - drirc->debug.disable_shrink_image_store = driQueryOptionb(&drirc->options, "radv_disable_shrink_image_store"); - drirc->debug.disable_sinking_load_input_fs = driQueryOptionb(&drirc->options, "radv_disable_sinking_load_input_fs"); - drirc->debug.disable_tc_compat_htile_general = - driQueryOptionb(&drirc->options, "radv_disable_tc_compat_htile_general"); + radv_parse_dri_options(drirc, &(driConfigFileParseParams){ + .driverName = "radv", + .applicationName = instance->vk.app_info.app_name, + .applicationVersion = instance->vk.app_info.app_version, + .engineName = instance->vk.app_info.engine_name, + .engineVersion = instance->vk.app_info.engine_version, + }); - drirc->debug.disable_trunc_coord = driQueryOptionb(&drirc->options, "radv_disable_trunc_coord"); if (instance->vk.app_info.engine_name && !strcmp(instance->vk.app_info.engine_name, "DXVK")) { /* Since 2.3.1+, DXVK uses the application version to notify the driver about D3D9. */ const bool is_d3d9 = instance->vk.app_info.app_version & 0x1; drirc->debug.disable_trunc_coord &= !is_d3d9; } - - drirc->debug.enable_mrt_output_nan_fixup = driQueryOptionb(&drirc->options, "radv_enable_mrt_output_nan_fixup"); - drirc->debug.flush_before_query_copy = driQueryOptionb(&drirc->options, "radv_flush_before_query_copy"); - drirc->debug.flush_before_timestamp_write = driQueryOptionb(&drirc->options, "radv_flush_before_timestamp_write"); - drirc->debug.invariant_geom = driQueryOptionb(&drirc->options, "radv_invariant_geom"); - drirc->debug.lower_terminate_to_discard = driQueryOptionb(&drirc->options, "vk_lower_terminate_to_discard"); - drirc->debug.no_dynamic_bounds = driQueryOptionb(&drirc->options, "radv_no_dynamic_bounds"); - drirc->debug.split_fma = driQueryOptionb(&drirc->options, "radv_split_fma"); - drirc->debug.ssbo_non_uniform = driQueryOptionb(&drirc->options, "radv_ssbo_non_uniform"); - drirc->debug.tex_non_uniform = driQueryOptionb(&drirc->options, "radv_tex_non_uniform"); - drirc->debug.wait_for_vm_map_updates = driQueryOptionb(&drirc->options, "radv_wait_for_vm_map_updates"); - drirc->debug.zero_vram = driQueryOptionb(&drirc->options, "radv_zero_vram"); - drirc->debug.no_implicit_varying_subgroup_size = - driQueryOptionb(&drirc->options, "radv_no_implicit_varying_subgroup_size"); - drirc->debug.app_layer = driQueryOptionstr(&drirc->options, "radv_app_layer"); - - drirc->debug.override_uniform_offset_alignment = - driQueryOptioni(&drirc->options, "radv_override_uniform_offset_alignment"); - - drirc->debug.rt_wave64 = driQueryOptionb(&drirc->options, "radv_rt_wave64"); - drirc->debug.hide_rebar_on_dgpu = driQueryOptionb(&drirc->options, "radv_hide_rebar_on_dgpu"); - drirc->debug.force_64_byte_sampled_image = driQueryOptionb(&drirc->options, "radv_force_64_byte_sampled_image"); -} - -static void -radv_init_dri_performance_options(struct radv_instance *instance) -{ - struct radv_drirc *drirc = &instance->drirc; - - drirc->performance.disable_ngg_gs = driQueryOptionb(&drirc->options, "radv_disable_ngg_gs"); - drirc->performance.enable_unified_heap_on_apu = driQueryOptionb(&drirc->options, "radv_enable_unified_heap_on_apu"); - drirc->performance.report_llvm9_version_string = - driQueryOptionb(&drirc->options, "radv_report_llvm9_version_string"); - drirc->performance.gfx12_hiz_wa = driQueryOptionstr(&drirc->options, "radv_gfx12_hiz_wa"); - drirc->performance.prefer_2d_swizzle_for_3d_storage = - driQueryOptionb(&drirc->options, "radv_prefer_2d_swizzle_for_3d_storage"); -} - -static void -radv_init_dri_features_options(struct radv_instance *instance) -{ - struct radv_drirc *drirc = &instance->drirc; - - drirc->features.cooperative_matrix2_nv = driQueryOptionb(&drirc->options, "radv_cooperative_matrix2_nv"); - drirc->features.emulate_rt = driQueryOptionb(&drirc->options, "radv_emulate_rt"); - drirc->features.enable_float16_gfx8 = driQueryOptionb(&drirc->options, "radv_enable_float16_gfx8"); - drirc->features.require_etc2 = driQueryOptionb(&drirc->options, "vk_require_etc2"); - drirc->features.require_astc = driQueryOptionb(&drirc->options, "vk_require_astc"); -} - -static void -radv_init_dri_misc_options(struct radv_instance *instance) -{ - struct radv_drirc *drirc = &instance->drirc; - - drirc->misc.clear_lds = driQueryOptionb(&drirc->options, "radv_clear_lds"); - drirc->misc.override_vram_size = driQueryOptioni(&drirc->options, "override_vram_size"); - drirc->misc.override_graphics_shader_version = - driQueryOptioni(&drirc->options, "radv_override_graphics_shader_version"); - drirc->misc.override_compute_shader_version = - driQueryOptioni(&drirc->options, "radv_override_compute_shader_version"); - drirc->misc.override_ray_tracing_shader_version = - driQueryOptioni(&drirc->options, "radv_override_ray_tracing_shader_version"); -} - -static void -radv_init_dri_options(struct radv_instance *instance) -{ - struct radv_drirc *drirc = &instance->drirc; - - driParseOptionInfo(&drirc->available_options, radv_dri_options, ARRAY_SIZE(radv_dri_options)); - driParseConfigFiles(&drirc->options, &drirc->available_options, - &(driConfigFileParseParams){ - .driverName = "radv", - .applicationName = instance->vk.app_info.app_name, - .applicationVersion = instance->vk.app_info.app_version, - .engineName = instance->vk.app_info.engine_name, - .engineVersion = instance->vk.app_info.engine_version, - }); - - radv_init_dri_debug_options(instance); - radv_init_dri_performance_options(instance); - radv_init_dri_features_options(instance); - radv_init_dri_misc_options(instance); } bool diff --git a/src/amd/vulkan/radv_instance.h b/src/amd/vulkan/radv_instance.h index 54e90bc080c..a3799f11d18 100644 --- a/src/amd/vulkan/radv_instance.h +++ b/src/amd/vulkan/radv_instance.h @@ -13,6 +13,7 @@ #include "util/simple_mtx.h" #include "util/xmlconfig.h" +#include "radv_drirc.h" #include "radv_radeon_winsys.h" #include "vk_instance.h" @@ -34,63 +35,6 @@ enum radv_trace_mode { RADV_TRACE_MODE_CTX_ROLLS = 1 << (VK_TRACE_MODE_COUNT + 2), }; -struct radv_drirc { - struct driOptionCache options; - struct driOptionCache available_options; - - struct { - bool disable_aniso_single_level; - bool disable_dcc; - bool disable_dcc_mips; - bool disable_dcc_stores; - bool disable_shrink_image_store; - bool disable_sinking_load_input_fs; - bool disable_tc_compat_htile_general; - bool disable_trunc_coord; - bool enable_mrt_output_nan_fixup; - bool flush_before_query_copy; - bool flush_before_timestamp_write; - bool invariant_geom; - bool lower_terminate_to_discard; - bool no_dynamic_bounds; - bool split_fma; - bool ssbo_non_uniform; - bool tex_non_uniform; - bool zero_vram; - bool wait_for_vm_map_updates; - bool no_implicit_varying_subgroup_size; - bool rt_wave64; - bool hide_rebar_on_dgpu; - bool force_64_byte_sampled_image; - char *app_layer; - int override_uniform_offset_alignment; - } debug; - - struct { - bool disable_ngg_gs; - bool enable_unified_heap_on_apu; - bool report_llvm9_version_string; - bool prefer_2d_swizzle_for_3d_storage; - char *gfx12_hiz_wa; - } performance; - - struct { - bool cooperative_matrix2_nv; - bool emulate_rt; - bool enable_float16_gfx8; - bool require_astc; - bool require_etc2; - } features; - - struct { - bool clear_lds; - int override_vram_size; - uint8_t override_compute_shader_version; - uint8_t override_graphics_shader_version; - uint8_t override_ray_tracing_shader_version; - } misc; -}; - struct radv_instance { struct vk_instance vk; diff --git a/src/util/driconf.h b/src/util/driconf.h index 4d53abfffd0..bc6c464d15c 100644 --- a/src/util/driconf.h +++ b/src/util/driconf.h @@ -715,157 +715,6 @@ DRI_CONF_OPT_B(venus_wsi_multi_plane_modifiers, def, \ "Enable support of multi-plane format modifiers for wsi images") -/** - * \brief RADV specific configuration options - */ - -#define DRI_CONF_RADV_REPORT_LLVM9_VERSION_STRING(def) \ - DRI_CONF_OPT_B(radv_report_llvm9_version_string, def, \ - "Report LLVM 9.0.1 for games that apply shader workarounds if missing (for ACO only)") - -#define DRI_CONF_RADV_ENABLE_MRT_OUTPUT_NAN_FIXUP(def) \ - DRI_CONF_OPT_B(radv_enable_mrt_output_nan_fixup, def, \ - "Replace NaN outputs from fragment shaders with zeroes for floating point render target") - -#define DRI_CONF_RADV_NO_DYNAMIC_BOUNDS(def) \ - DRI_CONF_OPT_B(radv_no_dynamic_bounds, def, \ - "Disabling bounds checking for dynamic buffer descriptors") - -#define DRI_CONF_RADV_DISABLE_SHRINK_IMAGE_STORE(def) \ - DRI_CONF_OPT_B(radv_disable_shrink_image_store, def, \ - "Disabling shrinking of image stores based on the format") - -#define DRI_CONF_RADV_OVERRIDE_UNIFORM_OFFSET_ALIGNMENT(def) \ - DRI_CONF_OPT_I(radv_override_uniform_offset_alignment, def, 0, 128, \ - "Override the minUniformBufferOffsetAlignment exposed to the application. (0 = default)") - -#define DRI_CONF_RADV_ZERO_VRAM(def) \ - DRI_CONF_OPT_B(radv_zero_vram, def, \ - "Initialize to zero all VRAM allocations") - -#define DRI_CONF_RADV_INVARIANT_GEOM(def) \ - DRI_CONF_OPT_B(radv_invariant_geom, def, \ - "Mark geometry-affecting outputs as invariant") - -#define DRI_CONF_RADV_SPLIT_FMA(def) \ - DRI_CONF_OPT_B(radv_split_fma, def, \ - "Split application-provided fused multiply-add in geometry stages") - -#define DRI_CONF_RADV_DISABLE_TC_COMPAT_HTILE_GENERAL(def) \ - DRI_CONF_OPT_B(radv_disable_tc_compat_htile_general, def, \ - "Disable TC-compat HTILE in GENERAL layout") - -#define DRI_CONF_RADV_DISABLE_DCC(def) \ - DRI_CONF_OPT_B(radv_disable_dcc, def, \ - "Disable DCC for color images on GFX8-GFX11.5") - -#define DRI_CONF_RADV_DISABLE_DCC_MIPS(def) \ - DRI_CONF_OPT_B(radv_disable_dcc_mips, def, \ - "Disable DCC for color images with mips on GFX8-GFX11.5") - -#define DRI_CONF_RADV_DISABLE_DCC_STORES(def) \ - DRI_CONF_OPT_B(radv_disable_dcc_stores, def, \ - "Disable DCC for color storage images on GFX10-GFX11.5") - -#define DRI_CONF_RADV_DISABLE_ANISO_SINGLE_LEVEL(def) \ - DRI_CONF_OPT_B(radv_disable_aniso_single_level, def, \ - "Disable anisotropic filtering for single level images") - -#define DRI_CONF_RADV_DISABLE_TRUNC_COORD(def) \ - DRI_CONF_OPT_B(radv_disable_trunc_coord, def, \ - "Disable TRUNC_COORD to use D3D10/11/12 point sampling behaviour. This has special behaviour for DXVK.") - -#define DRI_CONF_RADV_DISABLE_SINKING_LOAD_INPUT_FS(def) \ - DRI_CONF_OPT_B(radv_disable_sinking_load_input_fs, def, \ - "Disable sinking load inputs for fragment shaders") - -#define DRI_CONF_RADV_FLUSH_BEFORE_QUERY_COPY(def) \ - DRI_CONF_OPT_B( \ - radv_flush_before_query_copy, def, \ - "Wait for timestamps to be written before a query copy command") - -#define DRI_CONF_RADV_ENABLE_UNIFIED_HEAP_ON_APU(def) \ - DRI_CONF_OPT_B(radv_enable_unified_heap_on_apu, def, \ - "Enable an unified heap with DEVICE_LOCAL on integrated GPUs") - -#define DRI_CONF_RADV_TEX_NON_UNIFORM(def) \ - DRI_CONF_OPT_B(radv_tex_non_uniform, def, \ - "Always mark texture sample operations as non-uniform.") - -#define DRI_CONF_RADV_SSBO_NON_UNIFORM(def) \ - DRI_CONF_OPT_B(radv_ssbo_non_uniform, def, \ - "Always mark SSBO operations as non-uniform.") - -#define DRI_CONF_RADV_FLUSH_BEFORE_TIMESTAMP_WRITE(def) \ - DRI_CONF_OPT_B(radv_flush_before_timestamp_write, def, \ - "Wait for previous commands to finish before writing timestamps") - -#define DRI_CONF_RADV_RT_WAVE64(def) \ - DRI_CONF_OPT_B(radv_rt_wave64, def, \ - "Force wave64 in RT shaders") - -#define DRI_CONF_RADV_WAIT_FOR_VM_MAP_UPDATES(def) \ - DRI_CONF_OPT_B(radv_wait_for_vm_map_updates, def, \ - "Wait for VM MAP updates at allocation time to mitigate use-before-alloc") - -#define DRI_CONF_RADV_NO_IMPLICIT_VARYING_SUBGROUP_SIZE(def) \ - DRI_CONF_OPT_B(radv_no_implicit_varying_subgroup_size, def, \ - "Do not assume VK_PIPELINE_SHADER_STAGE_CREATE_ALLOW_VARYING_SUBGROUP_SIZE for SPIR-V 1.6.") - -#define DRI_CONF_RADV_PREFER_2D_SWIZZLE_FOR_3D_STORAGE(def) \ - DRI_CONF_OPT_B(radv_prefer_2d_swizzle_for_3d_storage, def, \ - "Prefer 2D swizzle mode for 3D storage images.") - -/** - * Overrides for forcing re-compilation of pipelines when RADV_BUILD_ID_OVERRIDE is enabled. - * These need to be bumped every time a compiler bugfix is backported (up to 8 shader - * versions are supported). - */ -#define DRI_CONF_RADV_OVERRIDE_GRAPHICS_SHADER_VERSION(def) \ - DRI_CONF_OPT_I(radv_override_graphics_shader_version, def, 0, 7, \ - "Override the shader version of graphics pipelines to force re-compilation. (0 = default)") - -#define DRI_CONF_RADV_OVERRIDE_COMPUTE_SHADER_VERSION(def) \ - DRI_CONF_OPT_I(radv_override_compute_shader_version, def, 0, 7, \ - "Override the shader version of compute pipelines to force re-compilation. (0 = default)") - -#define DRI_CONF_RADV_OVERRIDE_RAY_TRACING_SHADER_VERSION(def) \ - DRI_CONF_OPT_I(radv_override_ray_tracing_shader_version, def, 0, 7, \ - "Override the shader version of ray tracing pipelines to force re-compilation. (0 = default)") - -#define DRI_CONF_RADV_APP_LAYER() DRI_CONF_OPT_S_NODEF(radv_app_layer, "Select an application layer.") - -#define DRI_CONF_RADV_CLEAR_LDS(def) \ - DRI_CONF_OPT_B(radv_clear_lds, def, "Clear LDS at the end of shaders. Might decrease performance.") - -#define DRI_CONF_RADV_DISABLE_NGG_GS(def) \ - DRI_CONF_OPT_B(radv_disable_ngg_gs, def, "Disable NGG GS on GFX10/GFX10.3.") - -#define DRI_CONF_RADV_EMULATE_RT(def) \ - DRI_CONF_OPT_B(radv_emulate_rt, def, \ - "Expose RT extensions on GFX10 and below through software emulation.") - -#define DRI_CONF_RADV_ENABLE_FLOAT16_GFX8(def) \ - DRI_CONF_OPT_B(radv_enable_float16_gfx8, def, \ - "Expose float16 on GFX8, where it's supported but usually not beneficial.") - -#define DRI_CONF_RADV_COOPERATIVE_MATRIX2_NV(def) \ - DRI_CONF_OPT_B(radv_cooperative_matrix2_nv, def, \ - "Expose VK_NV_cooperative_matrix2 on supported hardware.") - -#define DRI_CONF_RADV_GFX12_HIZ_WA() \ - DRI_CONF_OPT_S_NODEF(radv_gfx12_hiz_wa, \ - "Choose the specific HiZ workaround to apply on GFX12 (RDNA4). " \ - "Accepted values are: disabled, partial or full") - -#define DRI_CONF_RADV_HIDE_REBAR_ON_DGPU(def) \ - DRI_CONF_OPT_B(radv_hide_rebar_on_dgpu, def, \ - "Hide resizable bar on dGPUs by exposing a fake carveout of 256MiB.") - -#define DRI_CONF_RADV_FORCE_64_BYTE_SAMPLED_IMAGE(def) \ - DRI_CONF_OPT_B(radv_force_64_byte_sampled_image, def, \ - "Force sampled images size to 64 bytes.") - /** * \brief ANV specific configuration options */