From 91c0d46afd4d49f392037a32620ef8dfd3e55e59 Mon Sep 17 00:00:00 2001 From: Gert Wollny Date: Thu, 28 Jul 2022 17:28:35 +0200 Subject: [PATCH] r600: Don't set TES_EVAL UCP dirty when it is not supported Fixes: 3340c7ce359252ad09b3e4d338837944482fb248 r600/sfn: lower CLIPVERTEX to clip planes Signed-off-by: Gert Wollny Part-of: --- src/gallium/drivers/r600/r600_state_common.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c index 8e1c061c37b..df4c64c8e09 100644 --- a/src/gallium/drivers/r600/r600_state_common.c +++ b/src/gallium/drivers/r600/r600_state_common.c @@ -284,8 +284,9 @@ static void r600_set_clip_state(struct pipe_context *ctx, rctx->clip_state.state = *state; r600_mark_atom_dirty(rctx, &rctx->clip_state.atom); rctx->driver_consts[PIPE_SHADER_VERTEX].vs_ucp_dirty = true; - rctx->driver_consts[PIPE_SHADER_TESS_EVAL].vs_ucp_dirty = true; rctx->driver_consts[PIPE_SHADER_GEOMETRY].vs_ucp_dirty = true; + if (rctx->b.family >= CHIP_CEDAR) + rctx->driver_consts[PIPE_SHADER_TESS_EVAL].vs_ucp_dirty = true; } static void r600_set_stencil_ref(struct pipe_context *ctx,