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amd,radv,radeonsi: add ac_{gfx11_reg_pair,gfx12_reg}

Browse source 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38000>
This commit is contained in:
Samuel Pitoiset 2025-10-22 15:12:13 +02:00 • committed by Marge Bot
parent 846b707045
commit 91bd46d34e
5 changed files with 29 additions and 33 deletions
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20
src/amd/common/ac_cmdbuf.h
View file

@ -22,6 +22,26 @@ struct ac_cmdbuf {
uint32_t *buf; /* The base pointer of the chunk. */
};
/* The structure layout is identical to a pair of registers in SET_*_REG_PAIRS_PACKED. */
struct ac_gfx11_reg_pair {
union {
/* A pair of register offsets. */
struct {
uint16_t reg_offset[2];
};
/* The same pair of register offsets as a dword. */
uint32_t reg_offsets;
};
/* A pair of register values for the register offsets above. */
uint32_t reg_value[2];
};
/* A pair of values for SET_*_REG_PAIRS. */
struct ac_gfx12_reg {
uint32_t reg_offset;
uint32_t reg_value;
};
#define ac_cmdbuf_begin(cs) struct ac_cmdbuf *__cs = (cs); \
uint32_t __cs_num = __cs->cdw; \
UNUSED uint32_t __cs_num_initial = __cs_num; \

9
src/amd/vulkan/radv_cmd_buffer.h
View file

@ -11,6 +11,7 @@
#ifndef RADV_CMD_BUFFER_H
#define RADV_CMD_BUFFER_H
#include "ac_cmdbuf.h"
#include "ac_vcn.h"
#include "vk_command_buffer.h"
@ -572,12 +573,6 @@ struct radv_cmd_buffer_upload {
struct list_head list;
};
/* A pair of values for SET_*_REG_PAIRS. */
struct gfx12_reg {
uint32_t reg_offset;
uint32_t reg_value;
};
struct radv_cmd_stream {
struct ac_cmdbuf *b;
@ -588,7 +583,7 @@ struct radv_cmd_stream {
uint32_t num_buffered_sh_regs;
struct {
struct gfx12_reg buffered_sh_regs[256];
struct ac_gfx12_reg buffered_sh_regs[256];
} gfx12;
};

2
src/gallium/drivers/radeonsi/si_build_pm4.h
View file

@ -352,7 +352,7 @@
* Registers are buffered on the stack and then copied to the command buffer at the end.
*/
#define gfx11_begin_packed_context_regs() \
struct gfx11_reg_pair __cs_context_regs[50]; \
struct ac_gfx11_reg_pair __cs_context_regs[50]; \
unsigned __cs_context_reg_count = 0;
#define gfx11_set_context_reg(reg, value) \

29
src/gallium/drivers/radeonsi/si_pipe.h
View file

@ -18,6 +18,7 @@
#include "util/u_vertex_state_cache.h"
#include "util/perf/u_trace.h"
#include "util/log.h"
#include "ac_cmdbuf.h"
#include "ac_descriptors.h"
#include "ac_sqtt.h"
#include "ac_spm.h"
@ -931,26 +932,6 @@ struct si_vertex_state {
uint32_t descriptors[4 * SI_MAX_ATTRIBS];
};
/* The structure layout is identical to a pair of registers in SET_*_REG_PAIRS_PACKED. */
struct gfx11_reg_pair {
union {
/* A pair of register offsets. */
struct {
uint16_t reg_offset[2];
};
/* The same pair of register offsets as a dword. */
uint32_t reg_offsets;
};
/* A pair of register values for the register offsets above. */
uint32_t reg_value[2];
};
/* A pair of values for SET_*_REG_PAIRS. */
struct gfx12_reg {
uint32_t reg_offset;
uint32_t reg_value;
};
typedef void (*pipe_draw_vertex_state_func)(struct pipe_context *ctx,
struct pipe_vertex_state *vstate,
uint32_t partial_velem_mask,
@ -1054,13 +1035,13 @@ struct si_context {
unsigned num_buffered_compute_sh_regs;
union {
struct {
struct gfx11_reg_pair buffered_gfx_sh_regs[32];
struct gfx11_reg_pair buffered_compute_sh_regs[32];
struct ac_gfx11_reg_pair buffered_gfx_sh_regs[32];
struct ac_gfx11_reg_pair buffered_compute_sh_regs[32];
} gfx11;
struct {
struct gfx12_reg buffered_gfx_sh_regs[64];
struct gfx12_reg buffered_compute_sh_regs[64];
struct ac_gfx12_reg buffered_gfx_sh_regs[64];
struct ac_gfx12_reg buffered_compute_sh_regs[64];
} gfx12;
};

2
src/gallium/drivers/radeonsi/si_state_draw.cpp
View file

@ -1209,7 +1209,7 @@ static void si_emit_draw_registers(struct si_context *sctx,
static ALWAYS_INLINE void
gfx11_emit_buffered_sh_regs_inline(struct si_context *sctx, unsigned *num_regs,
struct gfx11_reg_pair *reg_pairs)
struct ac_gfx11_reg_pair *reg_pairs)
{
unsigned reg_count = *num_regs;