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i965/drm: s/drm_intel/drm_bacon/g
Using drm_intel_* as a prefix is hazardous - we don't want to conflict with the actual libdrm_intel symbols. In particular, I think we could get into trouble during the final megadrivers linking. So, rename everything to an different yet arbitrary prefix. bacon and intel are the same number of characters, so we don't have to reindent the world. It's also an homage to Ian's "Bacon Trail" platform. I was going to use "drm_relic" to poke fun at libdrm being ancient, and so we could explain the name with a "historical reasons" pun, but it sounds too much like ralloc. Acked-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
Kenneth Graunke
parent
4ad0758f51
commit
91b973e3a3
4 changed files with 604 additions and 604 deletions
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@ -44,11 +44,11 @@ extern "C" {
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struct drm_clip_rect;
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typedef struct _drm_intel_bufmgr drm_intel_bufmgr;
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typedef struct _drm_intel_context drm_intel_context;
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typedef struct _drm_intel_bo drm_intel_bo;
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typedef struct _drm_bacon_bufmgr drm_bacon_bufmgr;
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typedef struct _drm_bacon_context drm_bacon_context;
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typedef struct _drm_bacon_bo drm_bacon_bo;
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struct _drm_intel_bo {
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struct _drm_bacon_bo {
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/**
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* Size in bytes of the buffer object.
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*
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@ -81,7 +81,7 @@ struct _drm_intel_bo {
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#endif
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/** Buffer manager context associated with this buffer object */
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drm_intel_bufmgr *bufmgr;
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drm_bacon_bufmgr *bufmgr;
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/**
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* MM-specific handle for accessing object
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@ -91,135 +91,135 @@ struct _drm_intel_bo {
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/**
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* Last seen card virtual address (offset from the beginning of the
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* aperture) for the object. This should be used to fill relocation
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* entries when calling drm_intel_bo_emit_reloc()
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* entries when calling drm_bacon_bo_emit_reloc()
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*/
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uint64_t offset64;
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};
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#define BO_ALLOC_FOR_RENDER (1<<0)
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drm_intel_bo *drm_intel_bo_alloc(drm_intel_bufmgr *bufmgr, const char *name,
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drm_bacon_bo *drm_bacon_bo_alloc(drm_bacon_bufmgr *bufmgr, const char *name,
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unsigned long size, unsigned int alignment);
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drm_intel_bo *drm_intel_bo_alloc_for_render(drm_intel_bufmgr *bufmgr,
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drm_bacon_bo *drm_bacon_bo_alloc_for_render(drm_bacon_bufmgr *bufmgr,
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const char *name,
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unsigned long size,
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unsigned int alignment);
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drm_intel_bo *drm_intel_bo_alloc_userptr(drm_intel_bufmgr *bufmgr,
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drm_bacon_bo *drm_bacon_bo_alloc_userptr(drm_bacon_bufmgr *bufmgr,
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const char *name,
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void *addr, uint32_t tiling_mode,
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uint32_t stride, unsigned long size,
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unsigned long flags);
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drm_intel_bo *drm_intel_bo_alloc_tiled(drm_intel_bufmgr *bufmgr,
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drm_bacon_bo *drm_bacon_bo_alloc_tiled(drm_bacon_bufmgr *bufmgr,
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const char *name,
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int x, int y, int cpp,
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uint32_t *tiling_mode,
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unsigned long *pitch,
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unsigned long flags);
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void drm_intel_bo_reference(drm_intel_bo *bo);
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void drm_intel_bo_unreference(drm_intel_bo *bo);
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int drm_intel_bo_map(drm_intel_bo *bo, int write_enable);
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int drm_intel_bo_unmap(drm_intel_bo *bo);
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void drm_bacon_bo_reference(drm_bacon_bo *bo);
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void drm_bacon_bo_unreference(drm_bacon_bo *bo);
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int drm_bacon_bo_map(drm_bacon_bo *bo, int write_enable);
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int drm_bacon_bo_unmap(drm_bacon_bo *bo);
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int drm_intel_bo_subdata(drm_intel_bo *bo, unsigned long offset,
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int drm_bacon_bo_subdata(drm_bacon_bo *bo, unsigned long offset,
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unsigned long size, const void *data);
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int drm_intel_bo_get_subdata(drm_intel_bo *bo, unsigned long offset,
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int drm_bacon_bo_get_subdata(drm_bacon_bo *bo, unsigned long offset,
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unsigned long size, void *data);
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void drm_intel_bo_wait_rendering(drm_intel_bo *bo);
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void drm_bacon_bo_wait_rendering(drm_bacon_bo *bo);
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void drm_intel_bufmgr_set_debug(drm_intel_bufmgr *bufmgr, int enable_debug);
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void drm_intel_bufmgr_destroy(drm_intel_bufmgr *bufmgr);
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int drm_intel_bo_exec(drm_intel_bo *bo, int used,
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void drm_bacon_bufmgr_set_debug(drm_bacon_bufmgr *bufmgr, int enable_debug);
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void drm_bacon_bufmgr_destroy(drm_bacon_bufmgr *bufmgr);
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int drm_bacon_bo_exec(drm_bacon_bo *bo, int used,
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struct drm_clip_rect *cliprects, int num_cliprects, int DR4);
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int drm_intel_bo_mrb_exec(drm_intel_bo *bo, int used,
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int drm_bacon_bo_mrb_exec(drm_bacon_bo *bo, int used,
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struct drm_clip_rect *cliprects, int num_cliprects, int DR4,
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unsigned int flags);
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int drm_intel_bufmgr_check_aperture_space(drm_intel_bo ** bo_array, int count);
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int drm_bacon_bufmgr_check_aperture_space(drm_bacon_bo ** bo_array, int count);
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int drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
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drm_intel_bo *target_bo, uint32_t target_offset,
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int drm_bacon_bo_emit_reloc(drm_bacon_bo *bo, uint32_t offset,
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drm_bacon_bo *target_bo, uint32_t target_offset,
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uint32_t read_domains, uint32_t write_domain);
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int drm_intel_bo_emit_reloc_fence(drm_intel_bo *bo, uint32_t offset,
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drm_intel_bo *target_bo,
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int drm_bacon_bo_emit_reloc_fence(drm_bacon_bo *bo, uint32_t offset,
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drm_bacon_bo *target_bo,
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uint32_t target_offset,
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uint32_t read_domains, uint32_t write_domain);
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int drm_intel_bo_pin(drm_intel_bo *bo, uint32_t alignment);
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int drm_intel_bo_unpin(drm_intel_bo *bo);
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int drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
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int drm_bacon_bo_pin(drm_bacon_bo *bo, uint32_t alignment);
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int drm_bacon_bo_unpin(drm_bacon_bo *bo);
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int drm_bacon_bo_set_tiling(drm_bacon_bo *bo, uint32_t * tiling_mode,
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uint32_t stride);
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int drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
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int drm_bacon_bo_get_tiling(drm_bacon_bo *bo, uint32_t * tiling_mode,
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uint32_t * swizzle_mode);
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int drm_intel_bo_flink(drm_intel_bo *bo, uint32_t * name);
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int drm_intel_bo_busy(drm_intel_bo *bo);
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int drm_intel_bo_madvise(drm_intel_bo *bo, int madv);
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int drm_intel_bo_use_48b_address_range(drm_intel_bo *bo, uint32_t enable);
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int drm_intel_bo_set_softpin_offset(drm_intel_bo *bo, uint64_t offset);
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int drm_bacon_bo_flink(drm_bacon_bo *bo, uint32_t * name);
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int drm_bacon_bo_busy(drm_bacon_bo *bo);
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int drm_bacon_bo_madvise(drm_bacon_bo *bo, int madv);
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int drm_bacon_bo_use_48b_address_range(drm_bacon_bo *bo, uint32_t enable);
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int drm_bacon_bo_set_softpin_offset(drm_bacon_bo *bo, uint64_t offset);
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int drm_intel_bo_disable_reuse(drm_intel_bo *bo);
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int drm_intel_bo_is_reusable(drm_intel_bo *bo);
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int drm_intel_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo);
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int drm_bacon_bo_disable_reuse(drm_bacon_bo *bo);
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int drm_bacon_bo_is_reusable(drm_bacon_bo *bo);
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int drm_bacon_bo_references(drm_bacon_bo *bo, drm_bacon_bo *target_bo);
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/* drm_intel_bufmgr_gem.c */
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drm_intel_bufmgr *drm_intel_bufmgr_gem_init(int fd, int batch_size);
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drm_intel_bo *drm_intel_bo_gem_create_from_name(drm_intel_bufmgr *bufmgr,
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/* drm_bacon_bufmgr_gem.c */
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drm_bacon_bufmgr *drm_bacon_bufmgr_gem_init(int fd, int batch_size);
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drm_bacon_bo *drm_bacon_bo_gem_create_from_name(drm_bacon_bufmgr *bufmgr,
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const char *name,
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unsigned int handle);
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void drm_intel_bufmgr_gem_enable_reuse(drm_intel_bufmgr *bufmgr);
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void drm_intel_bufmgr_gem_enable_fenced_relocs(drm_intel_bufmgr *bufmgr);
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void drm_intel_bufmgr_gem_set_vma_cache_size(drm_intel_bufmgr *bufmgr,
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void drm_bacon_bufmgr_gem_enable_reuse(drm_bacon_bufmgr *bufmgr);
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void drm_bacon_bufmgr_gem_enable_fenced_relocs(drm_bacon_bufmgr *bufmgr);
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void drm_bacon_bufmgr_gem_set_vma_cache_size(drm_bacon_bufmgr *bufmgr,
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int limit);
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int drm_intel_gem_bo_map_unsynchronized(drm_intel_bo *bo);
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int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo);
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int drm_intel_gem_bo_unmap_gtt(drm_intel_bo *bo);
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int drm_bacon_gem_bo_map_unsynchronized(drm_bacon_bo *bo);
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int drm_bacon_gem_bo_map_gtt(drm_bacon_bo *bo);
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int drm_bacon_gem_bo_unmap_gtt(drm_bacon_bo *bo);
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#define HAVE_DRM_INTEL_GEM_BO_DISABLE_IMPLICIT_SYNC 1
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int drm_intel_bufmgr_gem_can_disable_implicit_sync(drm_intel_bufmgr *bufmgr);
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void drm_intel_gem_bo_disable_implicit_sync(drm_intel_bo *bo);
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void drm_intel_gem_bo_enable_implicit_sync(drm_intel_bo *bo);
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int drm_bacon_bufmgr_gem_can_disable_implicit_sync(drm_bacon_bufmgr *bufmgr);
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void drm_bacon_gem_bo_disable_implicit_sync(drm_bacon_bo *bo);
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void drm_bacon_gem_bo_enable_implicit_sync(drm_bacon_bo *bo);
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void *drm_intel_gem_bo_map__cpu(drm_intel_bo *bo);
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void *drm_intel_gem_bo_map__gtt(drm_intel_bo *bo);
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void *drm_intel_gem_bo_map__wc(drm_intel_bo *bo);
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void *drm_bacon_gem_bo_map__cpu(drm_bacon_bo *bo);
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void *drm_bacon_gem_bo_map__gtt(drm_bacon_bo *bo);
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void *drm_bacon_gem_bo_map__wc(drm_bacon_bo *bo);
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int drm_intel_gem_bo_get_reloc_count(drm_intel_bo *bo);
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void drm_intel_gem_bo_clear_relocs(drm_intel_bo *bo, int start);
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void drm_intel_gem_bo_start_gtt_access(drm_intel_bo *bo, int write_enable);
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int drm_bacon_gem_bo_get_reloc_count(drm_bacon_bo *bo);
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void drm_bacon_gem_bo_clear_relocs(drm_bacon_bo *bo, int start);
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void drm_bacon_gem_bo_start_gtt_access(drm_bacon_bo *bo, int write_enable);
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int drm_intel_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, int crtc_id);
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int drm_bacon_get_pipe_from_crtc_id(drm_bacon_bufmgr *bufmgr, int crtc_id);
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int drm_intel_bufmgr_gem_get_devid(drm_intel_bufmgr *bufmgr);
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int drm_intel_gem_bo_wait(drm_intel_bo *bo, int64_t timeout_ns);
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int drm_bacon_bufmgr_gem_get_devid(drm_bacon_bufmgr *bufmgr);
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int drm_bacon_gem_bo_wait(drm_bacon_bo *bo, int64_t timeout_ns);
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drm_intel_context *drm_intel_gem_context_create(drm_intel_bufmgr *bufmgr);
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int drm_intel_gem_context_get_id(drm_intel_context *ctx,
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drm_bacon_context *drm_bacon_gem_context_create(drm_bacon_bufmgr *bufmgr);
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int drm_bacon_gem_context_get_id(drm_bacon_context *ctx,
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uint32_t *ctx_id);
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void drm_intel_gem_context_destroy(drm_intel_context *ctx);
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int drm_intel_gem_bo_context_exec(drm_intel_bo *bo, drm_intel_context *ctx,
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void drm_bacon_gem_context_destroy(drm_bacon_context *ctx);
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int drm_bacon_gem_bo_context_exec(drm_bacon_bo *bo, drm_bacon_context *ctx,
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int used, unsigned int flags);
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int drm_intel_gem_bo_fence_exec(drm_intel_bo *bo,
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drm_intel_context *ctx,
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int drm_bacon_gem_bo_fence_exec(drm_bacon_bo *bo,
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drm_bacon_context *ctx,
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int used,
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int in_fence,
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int *out_fence,
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unsigned int flags);
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int drm_intel_bo_gem_export_to_prime(drm_intel_bo *bo, int *prime_fd);
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drm_intel_bo *drm_intel_bo_gem_create_from_prime(drm_intel_bufmgr *bufmgr,
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int drm_bacon_bo_gem_export_to_prime(drm_bacon_bo *bo, int *prime_fd);
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drm_bacon_bo *drm_bacon_bo_gem_create_from_prime(drm_bacon_bufmgr *bufmgr,
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int prime_fd, int size);
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int drm_intel_reg_read(drm_intel_bufmgr *bufmgr,
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int drm_bacon_reg_read(drm_bacon_bufmgr *bufmgr,
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uint32_t offset,
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uint64_t *result);
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int drm_intel_get_reset_stats(drm_intel_context *ctx,
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int drm_bacon_get_reset_stats(drm_bacon_context *ctx,
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uint32_t *reset_count,
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uint32_t *active,
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uint32_t *pending);
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int drm_intel_get_subslice_total(int fd, unsigned int *subslice_total);
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int drm_intel_get_eu_total(int fd, unsigned int *eu_total);
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int drm_bacon_get_subslice_total(int fd, unsigned int *subslice_total);
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int drm_bacon_get_eu_total(int fd, unsigned int *eu_total);
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int drm_intel_get_pooled_eu(int fd);
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int drm_intel_get_min_eu_in_pool(int fd);
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int drm_bacon_get_pooled_eu(int fd);
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int drm_bacon_get_min_eu_in_pool(int fd);
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/** @{ */
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@ -46,22 +46,22 @@
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* Convenience functions for buffer management methods.
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*/
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drm_intel_bo *
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drm_intel_bo_alloc(drm_intel_bufmgr *bufmgr, const char *name,
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drm_bacon_bo *
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drm_bacon_bo_alloc(drm_bacon_bufmgr *bufmgr, const char *name,
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unsigned long size, unsigned int alignment)
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{
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return bufmgr->bo_alloc(bufmgr, name, size, alignment);
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}
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drm_intel_bo *
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drm_intel_bo_alloc_for_render(drm_intel_bufmgr *bufmgr, const char *name,
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drm_bacon_bo *
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drm_bacon_bo_alloc_for_render(drm_bacon_bufmgr *bufmgr, const char *name,
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unsigned long size, unsigned int alignment)
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{
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return bufmgr->bo_alloc_for_render(bufmgr, name, size, alignment);
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}
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drm_intel_bo *
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drm_intel_bo_alloc_userptr(drm_intel_bufmgr *bufmgr,
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drm_bacon_bo *
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drm_bacon_bo_alloc_userptr(drm_bacon_bufmgr *bufmgr,
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const char *name, void *addr,
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uint32_t tiling_mode,
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uint32_t stride,
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@ -74,8 +74,8 @@ drm_intel_bo_alloc_userptr(drm_intel_bufmgr *bufmgr,
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return NULL;
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}
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drm_intel_bo *
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drm_intel_bo_alloc_tiled(drm_intel_bufmgr *bufmgr, const char *name,
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drm_bacon_bo *
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drm_bacon_bo_alloc_tiled(drm_bacon_bufmgr *bufmgr, const char *name,
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int x, int y, int cpp, uint32_t *tiling_mode,
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unsigned long *pitch, unsigned long flags)
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{
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@ -84,13 +84,13 @@ drm_intel_bo_alloc_tiled(drm_intel_bufmgr *bufmgr, const char *name,
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}
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void
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drm_intel_bo_reference(drm_intel_bo *bo)
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drm_bacon_bo_reference(drm_bacon_bo *bo)
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{
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bo->bufmgr->bo_reference(bo);
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}
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void
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drm_intel_bo_unreference(drm_intel_bo *bo)
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drm_bacon_bo_unreference(drm_bacon_bo *bo)
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{
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if (bo == NULL)
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return;
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@ -99,26 +99,26 @@ drm_intel_bo_unreference(drm_intel_bo *bo)
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}
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int
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drm_intel_bo_map(drm_intel_bo *buf, int write_enable)
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drm_bacon_bo_map(drm_bacon_bo *buf, int write_enable)
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{
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return buf->bufmgr->bo_map(buf, write_enable);
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}
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int
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drm_intel_bo_unmap(drm_intel_bo *buf)
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drm_bacon_bo_unmap(drm_bacon_bo *buf)
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{
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return buf->bufmgr->bo_unmap(buf);
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}
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int
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drm_intel_bo_subdata(drm_intel_bo *bo, unsigned long offset,
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drm_bacon_bo_subdata(drm_bacon_bo *bo, unsigned long offset,
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unsigned long size, const void *data)
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{
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return bo->bufmgr->bo_subdata(bo, offset, size, data);
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}
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int
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drm_intel_bo_get_subdata(drm_intel_bo *bo, unsigned long offset,
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drm_bacon_bo_get_subdata(drm_bacon_bo *bo, unsigned long offset,
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unsigned long size, void *data)
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{
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int ret;
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@ -128,35 +128,35 @@ drm_intel_bo_get_subdata(drm_intel_bo *bo, unsigned long offset,
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if (size == 0 || data == NULL)
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return 0;
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ret = drm_intel_bo_map(bo, 0);
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ret = drm_bacon_bo_map(bo, 0);
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if (ret)
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return ret;
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memcpy(data, (unsigned char *)bo->virtual + offset, size);
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drm_intel_bo_unmap(bo);
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drm_bacon_bo_unmap(bo);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void
|
||||
drm_intel_bo_wait_rendering(drm_intel_bo *bo)
|
||||
drm_bacon_bo_wait_rendering(drm_bacon_bo *bo)
|
||||
{
|
||||
bo->bufmgr->bo_wait_rendering(bo);
|
||||
}
|
||||
|
||||
void
|
||||
drm_intel_bufmgr_destroy(drm_intel_bufmgr *bufmgr)
|
||||
drm_bacon_bufmgr_destroy(drm_bacon_bufmgr *bufmgr)
|
||||
{
|
||||
bufmgr->destroy(bufmgr);
|
||||
}
|
||||
|
||||
int
|
||||
drm_intel_bo_exec(drm_intel_bo *bo, int used,
|
||||
drm_bacon_bo_exec(drm_bacon_bo *bo, int used,
|
||||
drm_clip_rect_t * cliprects, int num_cliprects, int DR4)
|
||||
{
|
||||
return bo->bufmgr->bo_exec(bo, used, cliprects, num_cliprects, DR4);
|
||||
}
|
||||
|
||||
int
|
||||
drm_intel_bo_mrb_exec(drm_intel_bo *bo, int used,
|
||||
drm_bacon_bo_mrb_exec(drm_bacon_bo *bo, int used,
|
||||
drm_clip_rect_t *cliprects, int num_cliprects, int DR4,
|
||||
unsigned int rings)
|
||||
{
|
||||
|
|
@ -176,19 +176,19 @@ drm_intel_bo_mrb_exec(drm_intel_bo *bo, int used,
|
|||
}
|
||||
|
||||
void
|
||||
drm_intel_bufmgr_set_debug(drm_intel_bufmgr *bufmgr, int enable_debug)
|
||||
drm_bacon_bufmgr_set_debug(drm_bacon_bufmgr *bufmgr, int enable_debug)
|
||||
{
|
||||
bufmgr->debug = enable_debug;
|
||||
}
|
||||
|
||||
int
|
||||
drm_intel_bufmgr_check_aperture_space(drm_intel_bo ** bo_array, int count)
|
||||
drm_bacon_bufmgr_check_aperture_space(drm_bacon_bo ** bo_array, int count)
|
||||
{
|
||||
return bo_array[0]->bufmgr->check_aperture_space(bo_array, count);
|
||||
}
|
||||
|
||||
int
|
||||
drm_intel_bo_flink(drm_intel_bo *bo, uint32_t * name)
|
||||
drm_bacon_bo_flink(drm_bacon_bo *bo, uint32_t * name)
|
||||
{
|
||||
if (bo->bufmgr->bo_flink)
|
||||
return bo->bufmgr->bo_flink(bo, name);
|
||||
|
|
@ -197,8 +197,8 @@ drm_intel_bo_flink(drm_intel_bo *bo, uint32_t * name)
|
|||
}
|
||||
|
||||
int
|
||||
drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
|
||||
drm_intel_bo *target_bo, uint32_t target_offset,
|
||||
drm_bacon_bo_emit_reloc(drm_bacon_bo *bo, uint32_t offset,
|
||||
drm_bacon_bo *target_bo, uint32_t target_offset,
|
||||
uint32_t read_domains, uint32_t write_domain)
|
||||
{
|
||||
return bo->bufmgr->bo_emit_reloc(bo, offset,
|
||||
|
|
@ -208,8 +208,8 @@ drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
|
|||
|
||||
/* For fence registers, not GL fences */
|
||||
int
|
||||
drm_intel_bo_emit_reloc_fence(drm_intel_bo *bo, uint32_t offset,
|
||||
drm_intel_bo *target_bo, uint32_t target_offset,
|
||||
drm_bacon_bo_emit_reloc_fence(drm_bacon_bo *bo, uint32_t offset,
|
||||
drm_bacon_bo *target_bo, uint32_t target_offset,
|
||||
uint32_t read_domains, uint32_t write_domain)
|
||||
{
|
||||
return bo->bufmgr->bo_emit_reloc_fence(bo, offset,
|
||||
|
|
@ -219,7 +219,7 @@ drm_intel_bo_emit_reloc_fence(drm_intel_bo *bo, uint32_t offset,
|
|||
|
||||
|
||||
int
|
||||
drm_intel_bo_pin(drm_intel_bo *bo, uint32_t alignment)
|
||||
drm_bacon_bo_pin(drm_bacon_bo *bo, uint32_t alignment)
|
||||
{
|
||||
if (bo->bufmgr->bo_pin)
|
||||
return bo->bufmgr->bo_pin(bo, alignment);
|
||||
|
|
@ -228,7 +228,7 @@ drm_intel_bo_pin(drm_intel_bo *bo, uint32_t alignment)
|
|||
}
|
||||
|
||||
int
|
||||
drm_intel_bo_unpin(drm_intel_bo *bo)
|
||||
drm_bacon_bo_unpin(drm_bacon_bo *bo)
|
||||
{
|
||||
if (bo->bufmgr->bo_unpin)
|
||||
return bo->bufmgr->bo_unpin(bo);
|
||||
|
|
@ -237,7 +237,7 @@ drm_intel_bo_unpin(drm_intel_bo *bo)
|
|||
}
|
||||
|
||||
int
|
||||
drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
|
||||
drm_bacon_bo_set_tiling(drm_bacon_bo *bo, uint32_t * tiling_mode,
|
||||
uint32_t stride)
|
||||
{
|
||||
if (bo->bufmgr->bo_set_tiling)
|
||||
|
|
@ -248,7 +248,7 @@ drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
|
|||
}
|
||||
|
||||
int
|
||||
drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
|
||||
drm_bacon_bo_get_tiling(drm_bacon_bo *bo, uint32_t * tiling_mode,
|
||||
uint32_t * swizzle_mode)
|
||||
{
|
||||
if (bo->bufmgr->bo_get_tiling)
|
||||
|
|
@ -260,7 +260,7 @@ drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
|
|||
}
|
||||
|
||||
int
|
||||
drm_intel_bo_set_softpin_offset(drm_intel_bo *bo, uint64_t offset)
|
||||
drm_bacon_bo_set_softpin_offset(drm_bacon_bo *bo, uint64_t offset)
|
||||
{
|
||||
if (bo->bufmgr->bo_set_softpin_offset)
|
||||
return bo->bufmgr->bo_set_softpin_offset(bo, offset);
|
||||
|
|
@ -269,7 +269,7 @@ drm_intel_bo_set_softpin_offset(drm_intel_bo *bo, uint64_t offset)
|
|||
}
|
||||
|
||||
int
|
||||
drm_intel_bo_disable_reuse(drm_intel_bo *bo)
|
||||
drm_bacon_bo_disable_reuse(drm_bacon_bo *bo)
|
||||
{
|
||||
if (bo->bufmgr->bo_disable_reuse)
|
||||
return bo->bufmgr->bo_disable_reuse(bo);
|
||||
|
|
@ -277,7 +277,7 @@ drm_intel_bo_disable_reuse(drm_intel_bo *bo)
|
|||
}
|
||||
|
||||
int
|
||||
drm_intel_bo_is_reusable(drm_intel_bo *bo)
|
||||
drm_bacon_bo_is_reusable(drm_bacon_bo *bo)
|
||||
{
|
||||
if (bo->bufmgr->bo_is_reusable)
|
||||
return bo->bufmgr->bo_is_reusable(bo);
|
||||
|
|
@ -285,7 +285,7 @@ drm_intel_bo_is_reusable(drm_intel_bo *bo)
|
|||
}
|
||||
|
||||
int
|
||||
drm_intel_bo_busy(drm_intel_bo *bo)
|
||||
drm_bacon_bo_busy(drm_bacon_bo *bo)
|
||||
{
|
||||
if (bo->bufmgr->bo_busy)
|
||||
return bo->bufmgr->bo_busy(bo);
|
||||
|
|
@ -293,7 +293,7 @@ drm_intel_bo_busy(drm_intel_bo *bo)
|
|||
}
|
||||
|
||||
int
|
||||
drm_intel_bo_madvise(drm_intel_bo *bo, int madv)
|
||||
drm_bacon_bo_madvise(drm_bacon_bo *bo, int madv)
|
||||
{
|
||||
if (bo->bufmgr->bo_madvise)
|
||||
return bo->bufmgr->bo_madvise(bo, madv);
|
||||
|
|
@ -301,7 +301,7 @@ drm_intel_bo_madvise(drm_intel_bo *bo, int madv)
|
|||
}
|
||||
|
||||
int
|
||||
drm_intel_bo_use_48b_address_range(drm_intel_bo *bo, uint32_t enable)
|
||||
drm_bacon_bo_use_48b_address_range(drm_bacon_bo *bo, uint32_t enable)
|
||||
{
|
||||
if (bo->bufmgr->bo_use_48b_address_range) {
|
||||
bo->bufmgr->bo_use_48b_address_range(bo, enable);
|
||||
|
|
@ -312,13 +312,13 @@ drm_intel_bo_use_48b_address_range(drm_intel_bo *bo, uint32_t enable)
|
|||
}
|
||||
|
||||
int
|
||||
drm_intel_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo)
|
||||
drm_bacon_bo_references(drm_bacon_bo *bo, drm_bacon_bo *target_bo)
|
||||
{
|
||||
return bo->bufmgr->bo_references(bo, target_bo);
|
||||
}
|
||||
|
||||
int
|
||||
drm_intel_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, int crtc_id)
|
||||
drm_bacon_get_pipe_from_crtc_id(drm_bacon_bufmgr *bufmgr, int crtc_id)
|
||||
{
|
||||
if (bufmgr->get_pipe_from_crtc_id)
|
||||
return bufmgr->get_pipe_from_crtc_id(bufmgr, crtc_id);
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
|
|
@ -39,15 +39,15 @@
|
|||
*
|
||||
* Contains public methods followed by private storage for the buffer manager.
|
||||
*/
|
||||
struct _drm_intel_bufmgr {
|
||||
struct _drm_bacon_bufmgr {
|
||||
/**
|
||||
* Allocate a buffer object.
|
||||
*
|
||||
* Buffer objects are not necessarily initially mapped into CPU virtual
|
||||
* address space or graphics device aperture. They must be mapped
|
||||
* using bo_map() or drm_intel_gem_bo_map_gtt() to be used by the CPU.
|
||||
* using bo_map() or drm_bacon_gem_bo_map_gtt() to be used by the CPU.
|
||||
*/
|
||||
drm_intel_bo *(*bo_alloc) (drm_intel_bufmgr *bufmgr, const char *name,
|
||||
drm_bacon_bo *(*bo_alloc) (drm_bacon_bufmgr *bufmgr, const char *name,
|
||||
unsigned long size, unsigned int alignment);
|
||||
|
||||
/**
|
||||
|
|
@ -56,7 +56,7 @@ struct _drm_intel_bufmgr {
|
|||
*
|
||||
* This is otherwise the same as bo_alloc.
|
||||
*/
|
||||
drm_intel_bo *(*bo_alloc_for_render) (drm_intel_bufmgr *bufmgr,
|
||||
drm_bacon_bo *(*bo_alloc_for_render) (drm_bacon_bufmgr *bufmgr,
|
||||
const char *name,
|
||||
unsigned long size,
|
||||
unsigned int alignment);
|
||||
|
|
@ -67,7 +67,7 @@ struct _drm_intel_bufmgr {
|
|||
* Alignment is used when mapping to the gtt.
|
||||
* Flags may be I915_VMAP_READ_ONLY or I915_USERPTR_UNSYNCHRONIZED
|
||||
*/
|
||||
drm_intel_bo *(*bo_alloc_userptr)(drm_intel_bufmgr *bufmgr,
|
||||
drm_bacon_bo *(*bo_alloc_userptr)(drm_bacon_bufmgr *bufmgr,
|
||||
const char *name, void *addr,
|
||||
uint32_t tiling_mode, uint32_t stride,
|
||||
unsigned long size,
|
||||
|
|
@ -88,7 +88,7 @@ struct _drm_intel_bufmgr {
|
|||
* 'tiling_mode' field on return, as well as the pitch value, which
|
||||
* may have been rounded up to accommodate for tiling restrictions.
|
||||
*/
|
||||
drm_intel_bo *(*bo_alloc_tiled) (drm_intel_bufmgr *bufmgr,
|
||||
drm_bacon_bo *(*bo_alloc_tiled) (drm_bacon_bufmgr *bufmgr,
|
||||
const char *name,
|
||||
int x, int y, int cpp,
|
||||
uint32_t *tiling_mode,
|
||||
|
|
@ -96,13 +96,13 @@ struct _drm_intel_bufmgr {
|
|||
unsigned long flags);
|
||||
|
||||
/** Takes a reference on a buffer object */
|
||||
void (*bo_reference) (drm_intel_bo *bo);
|
||||
void (*bo_reference) (drm_bacon_bo *bo);
|
||||
|
||||
/**
|
||||
* Releases a reference on a buffer object, freeing the data if
|
||||
* no references remain.
|
||||
*/
|
||||
void (*bo_unreference) (drm_intel_bo *bo);
|
||||
void (*bo_unreference) (drm_bacon_bo *bo);
|
||||
|
||||
/**
|
||||
* Maps the buffer into userspace.
|
||||
|
|
@ -111,30 +111,30 @@ struct _drm_intel_bufmgr {
|
|||
* buffer to complete, first. The resulting mapping is available at
|
||||
* buf->virtual.
|
||||
*/
|
||||
int (*bo_map) (drm_intel_bo *bo, int write_enable);
|
||||
int (*bo_map) (drm_bacon_bo *bo, int write_enable);
|
||||
|
||||
/**
|
||||
* Reduces the refcount on the userspace mapping of the buffer
|
||||
* object.
|
||||
*/
|
||||
int (*bo_unmap) (drm_intel_bo *bo);
|
||||
int (*bo_unmap) (drm_bacon_bo *bo);
|
||||
|
||||
/**
|
||||
* Write data into an object.
|
||||
*
|
||||
* This is an optional function, if missing,
|
||||
* drm_intel_bo will map/memcpy/unmap.
|
||||
* drm_bacon_bo will map/memcpy/unmap.
|
||||
*/
|
||||
int (*bo_subdata) (drm_intel_bo *bo, unsigned long offset,
|
||||
int (*bo_subdata) (drm_bacon_bo *bo, unsigned long offset,
|
||||
unsigned long size, const void *data);
|
||||
|
||||
/**
|
||||
* Read data from an object
|
||||
*
|
||||
* This is an optional function, if missing,
|
||||
* drm_intel_bo will map/memcpy/unmap.
|
||||
* drm_bacon_bo will map/memcpy/unmap.
|
||||
*/
|
||||
int (*bo_get_subdata) (drm_intel_bo *bo, unsigned long offset,
|
||||
int (*bo_get_subdata) (drm_bacon_bo *bo, unsigned long offset,
|
||||
unsigned long size, void *data);
|
||||
|
||||
/**
|
||||
|
|
@ -144,12 +144,12 @@ struct _drm_intel_bufmgr {
|
|||
* bo_subdata, etc. It is merely a way for the driver to implement
|
||||
* glFinish.
|
||||
*/
|
||||
void (*bo_wait_rendering) (drm_intel_bo *bo);
|
||||
void (*bo_wait_rendering) (drm_bacon_bo *bo);
|
||||
|
||||
/**
|
||||
* Tears down the buffer manager instance.
|
||||
*/
|
||||
void (*destroy) (drm_intel_bufmgr *bufmgr);
|
||||
void (*destroy) (drm_bacon_bufmgr *bufmgr);
|
||||
|
||||
/**
|
||||
* Indicate if the buffer can be placed anywhere in the full ppgtt
|
||||
|
|
@ -163,7 +163,7 @@ struct _drm_intel_bufmgr {
|
|||
* \param bo Buffer to set the use_48b_address_range flag.
|
||||
* \param enable The flag value.
|
||||
*/
|
||||
void (*bo_use_48b_address_range) (drm_intel_bo *bo, uint32_t enable);
|
||||
void (*bo_use_48b_address_range) (drm_bacon_bo *bo, uint32_t enable);
|
||||
|
||||
/**
|
||||
* Add relocation entry in reloc_buf, which will be updated with the
|
||||
|
|
@ -185,24 +185,24 @@ struct _drm_intel_bufmgr {
|
|||
* dirtied in by the command that this
|
||||
* relocation is part of.
|
||||
*/
|
||||
int (*bo_emit_reloc) (drm_intel_bo *bo, uint32_t offset,
|
||||
drm_intel_bo *target_bo, uint32_t target_offset,
|
||||
int (*bo_emit_reloc) (drm_bacon_bo *bo, uint32_t offset,
|
||||
drm_bacon_bo *target_bo, uint32_t target_offset,
|
||||
uint32_t read_domains, uint32_t write_domain);
|
||||
int (*bo_emit_reloc_fence)(drm_intel_bo *bo, uint32_t offset,
|
||||
drm_intel_bo *target_bo,
|
||||
int (*bo_emit_reloc_fence)(drm_bacon_bo *bo, uint32_t offset,
|
||||
drm_bacon_bo *target_bo,
|
||||
uint32_t target_offset,
|
||||
uint32_t read_domains,
|
||||
uint32_t write_domain);
|
||||
|
||||
/** Executes the command buffer pointed to by bo. */
|
||||
int (*bo_exec) (drm_intel_bo *bo, int used,
|
||||
int (*bo_exec) (drm_bacon_bo *bo, int used,
|
||||
drm_clip_rect_t *cliprects, int num_cliprects,
|
||||
int DR4);
|
||||
|
||||
/** Executes the command buffer pointed to by bo on the selected
|
||||
* ring buffer
|
||||
*/
|
||||
int (*bo_mrb_exec) (drm_intel_bo *bo, int used,
|
||||
int (*bo_mrb_exec) (drm_bacon_bo *bo, int used,
|
||||
drm_clip_rect_t *cliprects, int num_cliprects,
|
||||
int DR4, unsigned flags);
|
||||
|
||||
|
|
@ -212,14 +212,14 @@ struct _drm_intel_bufmgr {
|
|||
* \param buf Buffer to pin
|
||||
* \param alignment Required alignment for aperture, in bytes
|
||||
*/
|
||||
int (*bo_pin) (drm_intel_bo *bo, uint32_t alignment);
|
||||
int (*bo_pin) (drm_bacon_bo *bo, uint32_t alignment);
|
||||
|
||||
/**
|
||||
* Unpin a buffer from the aperture, allowing it to be removed
|
||||
*
|
||||
* \param buf Buffer to unpin
|
||||
*/
|
||||
int (*bo_unpin) (drm_intel_bo *bo);
|
||||
int (*bo_unpin) (drm_bacon_bo *bo);
|
||||
|
||||
/**
|
||||
* Ask that the buffer be placed in tiling mode
|
||||
|
|
@ -227,7 +227,7 @@ struct _drm_intel_bufmgr {
|
|||
* \param buf Buffer to set tiling mode for
|
||||
* \param tiling_mode desired, and returned tiling mode
|
||||
*/
|
||||
int (*bo_set_tiling) (drm_intel_bo *bo, uint32_t * tiling_mode,
|
||||
int (*bo_set_tiling) (drm_bacon_bo *bo, uint32_t * tiling_mode,
|
||||
uint32_t stride);
|
||||
|
||||
/**
|
||||
|
|
@ -237,7 +237,7 @@ struct _drm_intel_bufmgr {
|
|||
* \param tiling_mode returned tiling mode
|
||||
* \param swizzle_mode returned swizzling mode
|
||||
*/
|
||||
int (*bo_get_tiling) (drm_intel_bo *bo, uint32_t * tiling_mode,
|
||||
int (*bo_get_tiling) (drm_bacon_bo *bo, uint32_t * tiling_mode,
|
||||
uint32_t * swizzle_mode);
|
||||
|
||||
/**
|
||||
|
|
@ -245,7 +245,7 @@ struct _drm_intel_bufmgr {
|
|||
* \param bo Buffer to set the softpin offset for
|
||||
* \param offset Softpin offset
|
||||
*/
|
||||
int (*bo_set_softpin_offset) (drm_intel_bo *bo, uint64_t offset);
|
||||
int (*bo_set_softpin_offset) (drm_bacon_bo *bo, uint64_t offset);
|
||||
|
||||
/**
|
||||
* Create a visible name for a buffer which can be used by other apps
|
||||
|
|
@ -253,13 +253,13 @@ struct _drm_intel_bufmgr {
|
|||
* \param buf Buffer to create a name for
|
||||
* \param name Returned name
|
||||
*/
|
||||
int (*bo_flink) (drm_intel_bo *bo, uint32_t * name);
|
||||
int (*bo_flink) (drm_bacon_bo *bo, uint32_t * name);
|
||||
|
||||
/**
|
||||
* Returns 1 if mapping the buffer for write could cause the process
|
||||
* to block, due to the object being active in the GPU.
|
||||
*/
|
||||
int (*bo_busy) (drm_intel_bo *bo);
|
||||
int (*bo_busy) (drm_bacon_bo *bo);
|
||||
|
||||
/**
|
||||
* Specify the volatility of the buffer.
|
||||
|
|
@ -273,9 +273,9 @@ struct _drm_intel_bufmgr {
|
|||
* Returns 1 if the buffer was retained, or 0 if it was discarded whilst
|
||||
* marked as I915_MADV_DONTNEED.
|
||||
*/
|
||||
int (*bo_madvise) (drm_intel_bo *bo, int madv);
|
||||
int (*bo_madvise) (drm_bacon_bo *bo, int madv);
|
||||
|
||||
int (*check_aperture_space) (drm_intel_bo ** bo_array, int count);
|
||||
int (*check_aperture_space) (drm_bacon_bo ** bo_array, int count);
|
||||
|
||||
/**
|
||||
* Disable buffer reuse for buffers which will be shared in some way,
|
||||
|
|
@ -284,14 +284,14 @@ struct _drm_intel_bufmgr {
|
|||
*
|
||||
* \param bo Buffer to disable reuse for
|
||||
*/
|
||||
int (*bo_disable_reuse) (drm_intel_bo *bo);
|
||||
int (*bo_disable_reuse) (drm_bacon_bo *bo);
|
||||
|
||||
/**
|
||||
* Query whether a buffer is reusable.
|
||||
*
|
||||
* \param bo Buffer to query
|
||||
*/
|
||||
int (*bo_is_reusable) (drm_intel_bo *bo);
|
||||
int (*bo_is_reusable) (drm_bacon_bo *bo);
|
||||
|
||||
/**
|
||||
*
|
||||
|
|
@ -304,18 +304,18 @@ struct _drm_intel_bufmgr {
|
|||
* \param bufmgr the associated buffer manager
|
||||
* \param crtc_id the crtc identifier
|
||||
*/
|
||||
int (*get_pipe_from_crtc_id) (drm_intel_bufmgr *bufmgr, int crtc_id);
|
||||
int (*get_pipe_from_crtc_id) (drm_bacon_bufmgr *bufmgr, int crtc_id);
|
||||
|
||||
/** Returns true if target_bo is in the relocation tree rooted at bo. */
|
||||
int (*bo_references) (drm_intel_bo *bo, drm_intel_bo *target_bo);
|
||||
int (*bo_references) (drm_bacon_bo *bo, drm_bacon_bo *target_bo);
|
||||
|
||||
/**< Enables verbose debugging printouts */
|
||||
int debug;
|
||||
};
|
||||
|
||||
struct _drm_intel_context {
|
||||
struct _drm_bacon_context {
|
||||
unsigned int ctx_id;
|
||||
struct _drm_intel_bufmgr *bufmgr;
|
||||
struct _drm_bacon_bufmgr *bufmgr;
|
||||
};
|
||||
|
||||
#define ALIGN(value, alignment) ((value + alignment - 1) & ~(alignment - 1))
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue