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nv50: SSG

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This commit is contained in:
Christoph Bumiller 2010-08-31 19:03:35 +02:00
parent e02c63bc10
commit 917c79b384
3 changed files with 18 additions and 10 deletions
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4
src/gallium/drivers/nv50/nv50_pc_emit.c
View file

@ -729,7 +729,7 @@ emit_bitop2(struct nv_pc *pc, struct nv_instruction *i)
{
pc->emit[0] = 0xd0000000;
if (SFILE(i, 0) == NV_FILE_IMM) {
if (SFILE(i, 1) == NV_FILE_IMM) {
emit_form_IMM(pc, i, 0);
if (i->opcode == NV_OP_OR)
@ -761,7 +761,7 @@ emit_arl(struct nv_pc *pc, struct nv_instruction *i)
pc->emit[0] = 0x00000001;
pc->emit[1] = 0xc0000000;
set_dst(pc, i->def[0]);
pc->emit[0] |= (i->def[0]->reg.id + 1) << 2;
set_pred(pc, i);
set_src_0(pc, i->src[0]);
pc->emit[0] |= (get_immd_u32(i->src[1]) & 0x3f) << 16;

13
src/gallium/drivers/nv50/nv50_pc_optimize.c
View file

@ -264,11 +264,8 @@ check_swap_src_0_1(struct nv_instruction *nvi)
return;
assert(src0 && src1);
if (src1->value->reg.file == NV_FILE_IMM) {
/* should only be present from folding a constant MUL part of a MAD */
assert(nvi->opcode == NV_OP_ADD);
if (src1->value->reg.file == NV_FILE_IMM)
return;
}
if (is_cmem_load(src0->value->insn)) {
if (!is_cmem_load(src1->value->insn)) {
@ -305,7 +302,7 @@ nv_pass_fold_stores(struct nv_pass *ctx, struct nv_basic_block *b)
continue;
nvi = sti->src[0]->value->insn;
if (!nvi || nvi->opcode == NV_OP_PHI)
if (!nvi || nvi->opcode == NV_OP_PHI || nv_is_vector_op(nvi->opcode))
continue;
assert(nvi->def[0] == sti->src[0]->value);
@ -536,9 +533,9 @@ constant_expression(struct nv_pc *pc, struct nv_instruction *nvi,
break;
case NV_OP_SUB:
switch (type) {
case NV_TYPE_F32: u.f32 = u0.f32 - u1.f32;
case NV_TYPE_U32: u.u32 = u0.u32 - u1.u32;
case NV_TYPE_S32: u.s32 = u0.s32 - u1.s32;
case NV_TYPE_F32: u.f32 = u0.f32 - u1.f32; break;
case NV_TYPE_U32: u.u32 = u0.u32 - u1.u32; break;
case NV_TYPE_S32: u.s32 = u0.s32 - u1.s32; break;
default:
assert(0);
break;

11
src/gallium/drivers/nv50/nv50_tgsi_to_nc.c
View file

@ -1595,6 +1595,17 @@ bld_instruction(struct bld_context *bld,
if (insn->Dst[0].Register.WriteMask & 0x8)
dst0[3] = bld_imm_f32(bld, 1.0f);
break;
case TGSI_OPCODE_SSG:
FOR_EACH_DST0_ENABLED_CHANNEL(c, insn) {
src0 = emit_fetch(bld, insn, 0, c);
src1 = bld_predicate(bld, src0, FALSE);
temp = bld_insn_2(bld, NV_OP_AND, src0, bld_imm_u32(bld, 0x80000000));
temp = bld_insn_2(bld, NV_OP_OR, temp, bld_imm_f32(bld, 1.0f));
dst0[c] = bld_insn_2(bld, NV_OP_XOR, temp, temp);
dst0[c]->insn->cc = NV_CC_EQ;
nv_reference(bld->pc, &dst0[c]->insn->flags_src, src1);
}
break;
case TGSI_OPCODE_SUB:
FOR_EACH_DST0_ENABLED_CHANNEL(c, insn) {
src0 = emit_fetch(bld, insn, 0, c);