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intel/genxml: Allow MI_FLUSH_DW on the blitter

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Pretty sure this is how you flush the blitter.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13520>
This commit is contained in:
Kenneth Graunke 2020-09-04 02:38:35 -07:00
parent d9ffdfc16d
commit 9163500aa1
3 changed files with 4 additions and 4 deletions
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2
src/intel/genxml/gen11.xml
View file

@ -5917,7 +5917,7 @@
<field name="Left Eye Display Buffer Base Address" start="108" end="127" type="address"/>
</instruction>
<instruction name="MI_FLUSH_DW" bias="2" length="5" engine="video">
<instruction name="MI_FLUSH_DW" bias="2" length="5" engine="blitter|video">
<field name="DWord Length" start="0" end="5" type="uint"/>
<field name="Video Pipeline Cache Invalidate" start="7" end="7" type="bool"/>
<field name="Notify Enable" start="8" end="8" type="bool"/>

4
src/intel/genxml/gen12.xml
View file

@ -6091,8 +6091,8 @@
<field name="Left Eye Display Buffer Base Address" start="108" end="127" type="address"/>
</instruction>
<instruction name="MI_FLUSH_DW" bias="2" length="5" engine="video">
<field name="DWord Length" start="0" end="5" type="uint"/>
<instruction name="MI_FLUSH_DW" bias="2" length="5" engine="blitter|video">
<field name="DWord Length" start="0" end="5" type="uint" default="3"/>
<field name="Video Pipeline Cache Invalidate" start="7" end="7" type="bool"/>
<field name="Notify Enable" start="8" end="8" type="bool"/>
<field name="Flush LLC" start="9" end="9" type="bool"/>

2
src/intel/genxml/gen125.xml
View file

@ -6074,7 +6074,7 @@
<field name="Left Eye Display Buffer Base Address" start="108" end="127" type="address"/>
</instruction>
<instruction name="MI_FLUSH_DW" bias="2" length="5" engine="video">
<instruction name="MI_FLUSH_DW" bias="2" length="5" engine="blitter|video">
<field name="DWord Length" start="0" end="5" type="uint"/>
<field name="Video Pipeline Cache Invalidate" start="7" end="7" type="bool"/>
<field name="Notify Enable" start="8" end="8" type="bool"/>