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synced 2026-04-21 14:10:37 +02:00
i965: indentation and formatting fixes
This commit is contained in:
Brian Paul
parent
131ac5b465
commit
914fcbafdb
1 changed files with 35 additions and 44 deletions
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@ -194,7 +194,7 @@ static void emit_linterp( struct brw_compile *p,
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interp[2] = brw_vec1_grf(nr+1, 0);
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interp[3] = brw_vec1_grf(nr+1, 4);
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for(i = 0; i < 4; i++ ) {
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for (i = 0; i < 4; i++) {
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if (mask & (1<<i)) {
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brw_LINE(p, brw_null_reg(), interp[i], deltas[0]);
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brw_MAC(p, dst[i], suboffset(interp[i],1), deltas[1]);
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@ -219,44 +219,42 @@ static void emit_pinterp( struct brw_compile *p,
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interp[2] = brw_vec1_grf(nr+1, 0);
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interp[3] = brw_vec1_grf(nr+1, 4);
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for(i = 0; i < 4; i++ ) {
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for (i = 0; i < 4; i++) {
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if (mask & (1<<i)) {
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brw_LINE(p, brw_null_reg(), interp[i], deltas[0]);
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brw_MAC(p, dst[i], suboffset(interp[i],1), deltas[1]);
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}
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}
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for(i = 0; i < 4; i++ ) {
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for (i = 0; i < 4; i++) {
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if (mask & (1<<i)) {
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brw_MUL(p, dst[i], dst[i], w[3]);
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}
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}
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}
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static void emit_cinterp( struct brw_compile *p,
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const struct brw_reg *dst,
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GLuint mask,
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const struct brw_reg *arg0 )
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{
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struct brw_reg interp[4];
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GLuint nr = arg0[0].nr;
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GLuint i;
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struct brw_reg interp[4];
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GLuint nr = arg0[0].nr;
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GLuint i;
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interp[0] = brw_vec1_grf(nr, 0);
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interp[1] = brw_vec1_grf(nr, 4);
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interp[2] = brw_vec1_grf(nr+1, 0);
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interp[3] = brw_vec1_grf(nr+1, 4);
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interp[0] = brw_vec1_grf(nr, 0);
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interp[1] = brw_vec1_grf(nr, 4);
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interp[2] = brw_vec1_grf(nr+1, 0);
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interp[3] = brw_vec1_grf(nr+1, 4);
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for(i = 0; i < 4; i++ ) {
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if (mask & (1<<i)) {
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brw_MOV(p, dst[i], suboffset(interp[i],3)); /* TODO: optimize away like other moves */
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}
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}
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for (i = 0; i < 4; i++) {
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if (mask & (1<<i)) {
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brw_MOV(p, dst[i], suboffset(interp[i],3)); /* TODO: optimize away like other moves */
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}
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}
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}
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static void emit_alu1( struct brw_compile *p,
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struct brw_instruction *(*func)(struct brw_compile *,
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struct brw_reg,
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@ -280,6 +278,7 @@ static void emit_alu1( struct brw_compile *p,
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brw_set_saturate(p, 0);
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}
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static void emit_alu2( struct brw_compile *p,
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struct brw_instruction *(*func)(struct brw_compile *,
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struct brw_reg,
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@ -351,6 +350,7 @@ static void emit_lrp( struct brw_compile *p,
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}
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}
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}
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static void emit_sop( struct brw_compile *p,
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const struct brw_reg *dst,
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GLuint mask,
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@ -376,7 +376,7 @@ static void emit_slt( struct brw_compile *p,
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const struct brw_reg *arg0,
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const struct brw_reg *arg1 )
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{
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emit_sop(p, dst, mask, BRW_CONDITIONAL_L, arg0, arg1);
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emit_sop(p, dst, mask, BRW_CONDITIONAL_L, arg0, arg1);
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}
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static void emit_sle( struct brw_compile *p,
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@ -385,7 +385,7 @@ static void emit_sle( struct brw_compile *p,
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const struct brw_reg *arg0,
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const struct brw_reg *arg1 )
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{
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emit_sop(p, dst, mask, BRW_CONDITIONAL_LE, arg0, arg1);
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emit_sop(p, dst, mask, BRW_CONDITIONAL_LE, arg0, arg1);
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}
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static void emit_sgt( struct brw_compile *p,
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@ -394,7 +394,7 @@ static void emit_sgt( struct brw_compile *p,
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const struct brw_reg *arg0,
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const struct brw_reg *arg1 )
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{
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emit_sop(p, dst, mask, BRW_CONDITIONAL_G, arg0, arg1);
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emit_sop(p, dst, mask, BRW_CONDITIONAL_G, arg0, arg1);
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}
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static void emit_sge( struct brw_compile *p,
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@ -403,7 +403,7 @@ static void emit_sge( struct brw_compile *p,
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const struct brw_reg *arg0,
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const struct brw_reg *arg1 )
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{
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emit_sop(p, dst, mask, BRW_CONDITIONAL_GE, arg0, arg1);
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emit_sop(p, dst, mask, BRW_CONDITIONAL_GE, arg0, arg1);
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}
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static void emit_seq( struct brw_compile *p,
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@ -412,7 +412,7 @@ static void emit_seq( struct brw_compile *p,
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const struct brw_reg *arg0,
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const struct brw_reg *arg1 )
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{
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emit_sop(p, dst, mask, BRW_CONDITIONAL_EQ, arg0, arg1);
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emit_sop(p, dst, mask, BRW_CONDITIONAL_EQ, arg0, arg1);
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}
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static void emit_sne( struct brw_compile *p,
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@ -421,7 +421,7 @@ static void emit_sne( struct brw_compile *p,
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const struct brw_reg *arg0,
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const struct brw_reg *arg1 )
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{
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emit_sop(p, dst, mask, BRW_CONDITIONAL_NEQ, arg0, arg1);
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emit_sop(p, dst, mask, BRW_CONDITIONAL_NEQ, arg0, arg1);
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}
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static void emit_cmp( struct brw_compile *p,
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@ -505,7 +505,7 @@ static void emit_dp3( struct brw_compile *p,
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const struct brw_reg *arg1 )
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{
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if (!(mask & WRITEMASK_XYZW))
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return; /* Do not emit dead code*/
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return; /* Do not emit dead code */
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assert((mask & WRITEMASK_XYZW) == WRITEMASK_X);
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@ -525,7 +525,7 @@ static void emit_dp4( struct brw_compile *p,
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const struct brw_reg *arg1 )
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{
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if (!(mask & WRITEMASK_XYZW))
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return; /* Do not emit dead code*/
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return; /* Do not emit dead code */
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assert((mask & WRITEMASK_XYZW) == WRITEMASK_X);
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@ -546,7 +546,7 @@ static void emit_dph( struct brw_compile *p,
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const struct brw_reg *arg1 )
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{
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if (!(mask & WRITEMASK_XYZW))
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return; /* Do not emit dead code*/
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return; /* Do not emit dead code */
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assert((mask & WRITEMASK_XYZW) == WRITEMASK_X);
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@ -592,7 +592,7 @@ static void emit_math1( struct brw_compile *p,
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const struct brw_reg *arg0 )
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{
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if (!(mask & WRITEMASK_XYZW))
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return; /* Do not emit dead code*/
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return; /* Do not emit dead code */
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//assert((mask & WRITEMASK_XYZW) == WRITEMASK_X ||
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// function == BRW_MATH_FUNCTION_SINCOS);
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@ -619,7 +619,7 @@ static void emit_math2( struct brw_compile *p,
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const struct brw_reg *arg1)
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{
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if (!(mask & WRITEMASK_XYZW))
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return; /* Do not emit dead code*/
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return; /* Do not emit dead code */
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assert((mask & WRITEMASK_XYZW) == WRITEMASK_X);
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@ -760,7 +760,6 @@ static void emit_txb( struct brw_wm_compile *c,
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brw_MOV(p, brw_message_reg(8), arg[3]);
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msgLength = 9;
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brw_SAMPLE(p,
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retype(vec16(dst[0]), BRW_REGISTER_TYPE_UW),
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1,
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@ -772,7 +771,6 @@ static void emit_txb( struct brw_wm_compile *c,
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8, /* responseLength */
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msgLength,
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0);
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}
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@ -823,7 +821,6 @@ static void emit_kil( struct brw_wm_compile *c,
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struct brw_reg r0uw = retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW);
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GLuint i;
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/* XXX - usually won't need 4 compares!
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*/
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for (i = 0; i < 4; i++) {
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@ -836,6 +833,7 @@ static void emit_kil( struct brw_wm_compile *c,
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}
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}
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static void fire_fb_write( struct brw_wm_compile *c,
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GLuint base_reg,
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GLuint nr,
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@ -869,6 +867,7 @@ static void fire_fb_write( struct brw_wm_compile *c,
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eot);
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}
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static void emit_aa( struct brw_wm_compile *c,
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struct brw_reg *arg1,
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GLuint reg )
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@ -962,7 +961,6 @@ static void emit_fb_write( struct brw_wm_compile *c,
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nr += 2;
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}
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if (!c->key.runtime_check_aads_emit) {
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if (c->key.aa_dest_stencil_reg)
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emit_aa(c, arg1, 2);
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@ -996,8 +994,6 @@ static void emit_fb_write( struct brw_wm_compile *c,
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}
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/* Post-fragment-program processing. Send the results to the
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* framebuffer.
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*/
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@ -1022,6 +1018,7 @@ static void emit_spill( struct brw_wm_compile *c,
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slot);
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}
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static void emit_unspill( struct brw_wm_compile *c,
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struct brw_reg reg,
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GLuint slot )
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@ -1047,7 +1044,6 @@ static void emit_unspill( struct brw_wm_compile *c,
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}
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/**
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* Retrieve upto 4 GEN4 register pairs for the given wm reg:
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*/
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@ -1073,6 +1069,7 @@ static void get_argument_regs( struct brw_wm_compile *c,
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}
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}
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static void spill_values( struct brw_wm_compile *c,
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struct brw_wm_value *values,
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GLuint nr )
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@ -1085,7 +1082,6 @@ static void spill_values( struct brw_wm_compile *c,
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}
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/* Emit the fragment program instructions here.
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*/
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void brw_wm_emit( struct brw_wm_compile *c )
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@ -1176,7 +1172,7 @@ void brw_wm_emit( struct brw_wm_compile *c )
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emit_alu1(p, brw_RNDD, dst, dst_flags, args[0]);
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break;
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case OPCODE_DP3: /* */
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case OPCODE_DP3:
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emit_dp3(p, dst, dst_flags, args[0], args[1]);
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break;
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@ -1188,7 +1184,7 @@ void brw_wm_emit( struct brw_wm_compile *c )
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emit_dph(p, dst, dst_flags, args[0], args[1]);
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break;
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case OPCODE_LRP: /* */
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case OPCODE_LRP:
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emit_lrp(p, dst, dst_flags, args[0], args[1], args[2]);
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break;
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@ -1315,8 +1311,3 @@ void brw_wm_emit( struct brw_wm_compile *c )
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inst->dst[i]->spill_slot);
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}
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}
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