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radeonsi: decrease the number of compiler threads
Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit ed2b3f5c81)
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parent
529c440dd3
commit
90bbcb93b1
2 changed files with 8 additions and 3 deletions
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@ -970,7 +970,7 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws,
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if (!util_queue_init(&sscreen->shader_compiler_queue_low_priority,
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"si_shader_low",
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32, num_compiler_threads,
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32, num_compiler_threads_lowprio,
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UTIL_QUEUE_INIT_RESIZE_IF_FULL |
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UTIL_QUEUE_INIT_USE_MINIMUM_PRIORITY)) {
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si_destroy_shader_cache(sscreen);
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@ -113,10 +113,15 @@ struct si_screen {
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/* Shader compiler queue for multithreaded compilation. */
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struct util_queue shader_compiler_queue;
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LLVMTargetMachineRef tm[4]; /* used by the queue only */
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/* Use at most 3 normal compiler threads on quadcore and better.
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* Hyperthreaded CPUs report the number of threads, but we want
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* the number of cores. */
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LLVMTargetMachineRef tm[3]; /* used by the queue only */
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struct util_queue shader_compiler_queue_low_priority;
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LLVMTargetMachineRef tm_low_priority[4];
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/* Use at most 2 low priority threads on quadcore and better.
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* We want to minimize the impact on multithreaded Mesa. */
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LLVMTargetMachineRef tm_low_priority[2]; /* at most 2 threads */
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};
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struct si_blend_color {
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