diff --git a/src/amd/common/ac_binary.c b/src/amd/common/ac_binary.c index 748791c7519..a836dc23579 100644 --- a/src/amd/common/ac_binary.c +++ b/src/amd/common/ac_binary.c @@ -18,7 +18,8 @@ /* Parse configuration data in .AMDGPU.config section format. */ void ac_parse_shader_binary_config(const char *data, size_t nbytes, unsigned wave_size, - const struct radeon_info *info, struct ac_shader_config *conf) + const struct ac_compiler_info *compiler_info, + struct ac_shader_config *conf) { for (size_t i = 0; i < nbytes; i += 8) { unsigned reg = util_le32_to_cpu(*(uint32_t *)(data + i)); @@ -29,7 +30,7 @@ void ac_parse_shader_binary_config(const char *data, size_t nbytes, unsigned wav case R_00B228_SPI_SHADER_PGM_RSRC1_GS: case R_00B848_COMPUTE_PGM_RSRC1: case R_00B428_SPI_SHADER_PGM_RSRC1_HS: - if (wave_size == 32 || info->compiler_info.wave64_vgpr_alloc_granularity == 8) + if (wave_size == 32 || compiler_info->wave64_vgpr_alloc_granularity == 8) conf->num_vgprs = MAX2(conf->num_vgprs, (G_00B028_VGPRS(value) + 1) * 8); else conf->num_vgprs = MAX2(conf->num_vgprs, (G_00B028_VGPRS(value) + 1) * 4); @@ -73,7 +74,7 @@ void ac_parse_shader_binary_config(const char *data, size_t nbytes, unsigned wav break; case R_0286E8_SPI_TMPRING_SIZE: case R_00B860_COMPUTE_TMPRING_SIZE: - if (info->gfx_level >= GFX11) + if (compiler_info->gfx_level >= GFX11) conf->scratch_bytes_per_wave = G_00B860_WAVESIZE(value) * 256; else conf->scratch_bytes_per_wave = G_00B860_WAVESIZE(value) * 1024; diff --git a/src/amd/common/ac_binary.h b/src/amd/common/ac_binary.h index f28dd1fd7d6..b58a10eaa3e 100644 --- a/src/amd/common/ac_binary.h +++ b/src/amd/common/ac_binary.h @@ -16,6 +16,7 @@ extern "C" { #endif struct radeon_info; +struct ac_compiler_info; struct ac_shader_config { unsigned num_sgprs; @@ -35,7 +36,8 @@ struct ac_shader_config { }; void ac_parse_shader_binary_config(const char *data, size_t nbytes, unsigned wave_size, - const struct radeon_info *info, struct ac_shader_config *conf); + const struct ac_compiler_info *compiler_info, + struct ac_shader_config *conf); unsigned ac_align_shader_binary_for_prefetch(const struct radeon_info *info, unsigned size); diff --git a/src/amd/common/ac_rtld.c b/src/amd/common/ac_rtld.c index f3e7b3acc6b..579c8efdac6 100644 --- a/src/amd/common/ac_rtld.c +++ b/src/amd/common/ac_rtld.c @@ -105,7 +105,7 @@ bool ac_rtld_open(struct ac_rtld_binary *binary, struct ac_rtld_open_info i) memset(binary, 0, sizeof(*binary)); memcpy(&binary->options, &i.options, sizeof(binary->options)); binary->wave_size = i.wave_size; - binary->gfx_level = i.info->gfx_level; + binary->gfx_level = i.gfx_level; binary->num_parts = i.num_parts; binary->parts = calloc(sizeof(*binary->parts), i.num_parts); if (!binary->parts) @@ -277,7 +277,8 @@ bool ac_rtld_get_section_by_name(struct ac_rtld_binary *binary, const char *name return get_section_by_name(&binary->parts[0], name, data, nbytes); } -bool ac_rtld_read_config(const struct radeon_info *info, struct ac_rtld_binary *binary, +bool ac_rtld_read_config(const struct ac_compiler_info *compiler_info, + struct ac_rtld_binary *binary, struct ac_shader_config *config) { for (unsigned i = 0; i < binary->num_parts; ++i) { @@ -290,7 +291,8 @@ bool ac_rtld_read_config(const struct radeon_info *info, struct ac_rtld_binary * /* TODO: be precise about scratch use? */ struct ac_shader_config c = {0}; - ac_parse_shader_binary_config(config_data, config_nbytes, binary->wave_size, info, &c); + ac_parse_shader_binary_config(config_data, config_nbytes, binary->wave_size, + compiler_info, &c); config->num_sgprs = MAX2(config->num_sgprs, c.num_sgprs); config->num_vgprs = MAX2(config->num_vgprs, c.num_vgprs); diff --git a/src/amd/common/ac_rtld.h b/src/amd/common/ac_rtld.h index a9edc4c63cc..818d44ab18c 100644 --- a/src/amd/common/ac_rtld.h +++ b/src/amd/common/ac_rtld.h @@ -21,7 +21,7 @@ extern "C" { struct ac_rtld_part; struct ac_shader_config; -struct radeon_info; +struct ac_compiler_info; struct ac_rtld_options { /* Loader will insert an s_sethalt 1 instruction as the @@ -66,7 +66,7 @@ typedef bool (*ac_rtld_get_external_symbol_cb)(enum amd_gfx_level gfx_level, voi * the opened binary. */ struct ac_rtld_open_info { - const struct radeon_info *info; + enum amd_gfx_level gfx_level; struct ac_rtld_options options; mesa_shader_stage shader_type; unsigned wave_size; @@ -83,7 +83,8 @@ void ac_rtld_close(struct ac_rtld_binary *binary); bool ac_rtld_get_section_by_name(struct ac_rtld_binary *binary, const char *name, const char **data, size_t *nbytes); -bool ac_rtld_read_config(const struct radeon_info *info, struct ac_rtld_binary *binary, +bool ac_rtld_read_config(const struct ac_compiler_info *compiler_info, + struct ac_rtld_binary *binary, struct ac_shader_config *config); struct ac_rtld_upload_info { diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index 77ca18b28a5..977e7126b22 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -1603,7 +1603,7 @@ radv_open_rtld_binary(struct radv_device *device, const struct radv_shader_binar size_t elf_size = ((struct radv_shader_binary_rtld *)binary)->elf_size; struct ac_rtld_open_info open_info = { - .info = &pdev->info, + .gfx_level = pdev->info.gfx_level, .shader_type = binary->info.stage, .wave_size = binary->info.wave_size, .num_parts = 1, @@ -2156,7 +2156,7 @@ radv_postprocess_binary_config(struct radv_device *device, struct radv_shader_bi return false; } - if (!ac_rtld_read_config(&pdev->info, &rtld_binary, config)) { + if (!ac_rtld_read_config(&pdev->info.compiler_info, &rtld_binary, config)) { ac_rtld_close(&rtld_binary); return false; } diff --git a/src/gallium/drivers/radeonsi/si_debug_gfx_compute.c b/src/gallium/drivers/radeonsi/si_debug_gfx_compute.c index 347aa4b85a9..58dba841a8f 100644 --- a/src/gallium/drivers/radeonsi/si_debug_gfx_compute.c +++ b/src/gallium/drivers/radeonsi/si_debug_gfx_compute.c @@ -468,7 +468,7 @@ static void si_add_split_disasm(struct si_screen *screen, struct ac_rtld_binary mesa_shader_stage stage, unsigned wave_size) { if (!ac_rtld_open(rtld_binary, (struct ac_rtld_open_info){ - .info = &screen->info, + .gfx_level = screen->info.gfx_level, .shader_type = stage, .wave_size = wave_size, .num_parts = 1, diff --git a/src/gallium/drivers/radeonsi/si_shader_binary.c b/src/gallium/drivers/radeonsi/si_shader_binary.c index 1834168a5ef..43f81491602 100644 --- a/src/gallium/drivers/radeonsi/si_shader_binary.c +++ b/src/gallium/drivers/radeonsi/si_shader_binary.c @@ -39,7 +39,7 @@ static bool si_shader_binary_open(struct si_screen *screen, struct si_shader *sh #undef add_part bool ok = ac_rtld_open( - rtld, (struct ac_rtld_open_info){.info = &screen->info, + rtld, (struct ac_rtld_open_info){.gfx_level = screen->info.gfx_level, .options = { .halt_at_entry = screen->options.halt_shaders, @@ -399,7 +399,7 @@ static void si_shader_dump_disassembly(struct si_screen *screen, struct ac_rtld_binary rtld_binary; if (!ac_rtld_open(&rtld_binary, (struct ac_rtld_open_info){ - .info = &screen->info, + .gfx_level = screen->info.gfx_level, .shader_type = stage, .wave_size = wave_size, .num_parts = 1, diff --git a/src/gallium/drivers/radeonsi/si_shader_llvm.c b/src/gallium/drivers/radeonsi/si_shader_llvm.c index 4a740c82886..2655a62d408 100644 --- a/src/gallium/drivers/radeonsi/si_shader_llvm.c +++ b/src/gallium/drivers/radeonsi/si_shader_llvm.c @@ -94,7 +94,7 @@ static bool si_compile_llvm(struct si_screen *sscreen, struct si_shader_binary * struct ac_rtld_binary rtld; if (!ac_rtld_open(&rtld, (struct ac_rtld_open_info){ - .info = &sscreen->info, + .gfx_level = sscreen->info.gfx_level, .shader_type = stage, .wave_size = ac->wave_size, .num_parts = 1, @@ -102,7 +102,7 @@ static bool si_compile_llvm(struct si_screen *sscreen, struct si_shader_binary * .elf_sizes = &binary->code_size})) return false; - bool ok = ac_rtld_read_config(&sscreen->info, &rtld, conf); + bool ok = ac_rtld_read_config(&sscreen->info.compiler_info, &rtld, conf); ac_rtld_close(&rtld); return ok; }