From 90858dd718aebf9e864468e5d279cfd618acab81 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Fri, 1 Oct 2021 09:41:49 +0200 Subject: [PATCH] radv: move ngg early prim export determination earlier MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Samuel Pitoiset Reviewed-by: Timur Kristóf Part-of: --- src/amd/common/ac_nir.h | 2 +- src/amd/common/ac_nir_lower_ngg.c | 4 ++-- src/amd/vulkan/radv_pipeline.c | 3 +++ src/amd/vulkan/radv_shader.c | 2 +- 4 files changed, 7 insertions(+), 4 deletions(-) diff --git a/src/amd/common/ac_nir.h b/src/amd/common/ac_nir.h index dd95139a266..d9eb77c6f5d 100644 --- a/src/amd/common/ac_nir.h +++ b/src/amd/common/ac_nir.h @@ -95,7 +95,6 @@ typedef struct { unsigned lds_bytes_if_culling_off; bool passthrough; - bool early_prim_export; uint64_t nggc_inputs_read_by_pos; uint64_t nggc_inputs_read_by_others; } ac_nir_ngg_config; @@ -107,6 +106,7 @@ ac_nir_lower_ngg_nogs(nir_shader *shader, unsigned max_workgroup_size, unsigned wave_size, bool can_cull, + bool early_prim_export, bool consider_passthrough, bool export_prim_id, bool provoking_vtx_last, diff --git a/src/amd/common/ac_nir_lower_ngg.c b/src/amd/common/ac_nir_lower_ngg.c index 228ebba1cbc..99f6ac422bf 100644 --- a/src/amd/common/ac_nir_lower_ngg.c +++ b/src/amd/common/ac_nir_lower_ngg.c @@ -1261,6 +1261,7 @@ ac_nir_lower_ngg_nogs(nir_shader *shader, unsigned max_workgroup_size, unsigned wave_size, bool can_cull, + bool early_prim_export, bool consider_passthrough, bool export_prim_id, bool provoking_vtx_last, @@ -1282,7 +1283,7 @@ ac_nir_lower_ngg_nogs(nir_shader *shader, lower_ngg_nogs_state state = { .passthrough = passthrough, .export_prim_id = export_prim_id, - .early_prim_export = exec_list_is_singular(&impl->body), + .early_prim_export = early_prim_export, .use_edgeflags = use_edgeflags, .num_vertices_per_primitives = num_vertices_per_primitives, .provoking_vtx_idx = provoking_vtx_last ? (num_vertices_per_primitives - 1) : 0, @@ -1419,7 +1420,6 @@ ac_nir_lower_ngg_nogs(nir_shader *shader, ac_nir_ngg_config ret = { .lds_bytes_if_culling_off = lds_bytes_if_culling_off, .passthrough = passthrough, - .early_prim_export = state.early_prim_export, .nggc_inputs_read_by_pos = state.inputs_needed_by_pos, .nggc_inputs_read_by_others = state.inputs_needed_by_others, }; diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index d9e28280827..f7c6697a867 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -2783,6 +2783,9 @@ radv_determine_ngg_settings(struct radv_pipeline *pipeline, infos[es_stage].has_ngg_culling = radv_consider_culling(device, nir[es_stage], ps_inputs_read, num_vertices_per_prim); + + nir_function_impl *impl = nir_shader_get_entrypoint(nir[es_stage]); + infos[es_stage].has_ngg_early_prim_export = exec_list_is_singular(&impl->body); } } diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index 1786370b7b8..99139ecae11 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -1008,13 +1008,13 @@ void radv_lower_ngg(struct radv_device *device, struct nir_shader *nir, info->workgroup_size, info->wave_size, info->has_ngg_culling, + info->has_ngg_early_prim_export, info->is_ngg_passthrough, export_prim_id, pl_key->vs.provoking_vtx_last, false, pl_key->vs.instance_rate_inputs); - info->has_ngg_early_prim_export = out_conf.early_prim_export; info->num_lds_blocks_when_not_culling = DIV_ROUND_UP(out_conf.lds_bytes_if_culling_off, device->physical_device->rad_info.lds_encode_granularity); info->is_ngg_passthrough = out_conf.passthrough; } else if (nir->info.stage == MESA_SHADER_GEOMETRY) {