From 9076b38610d9635beefa0354e148ac67f1467514 Mon Sep 17 00:00:00 2001 From: Emma Anholt Date: Wed, 16 Nov 2022 16:07:03 -0800 Subject: [PATCH] freedreno: Don't WFI and set RB_DBG_ECO_CNTL if it's not changing. Part-of: --- src/gallium/drivers/freedreno/a6xx/fd6_draw.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c index 9be279b9edf..3ce6e7d5e2c 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c @@ -429,18 +429,21 @@ fd6_clear_lrz(struct fd_batch *batch, struct fd_resource *zsbuf, double depth) a fd6_event_write(batch, ring, 0x3f, false); - OUT_WFI5(ring); - - OUT_PKT4(ring, REG_A6XX_RB_DBG_ECO_CNTL, 1); - OUT_RING(ring, screen->info->a6xx.magic.RB_DBG_ECO_CNTL_blit); + if (screen->info->a6xx.magic.RB_DBG_ECO_CNTL_blit != screen->info->a6xx.magic.RB_DBG_ECO_CNTL) { + /* This a non-context register, so we have to WFI before changing. */ + OUT_WFI5(ring); + OUT_PKT4(ring, REG_A6XX_RB_DBG_ECO_CNTL, 1); + OUT_RING(ring, screen->info->a6xx.magic.RB_DBG_ECO_CNTL_blit); + } OUT_PKT7(ring, CP_BLIT, 1); OUT_RING(ring, CP_BLIT_0_OP(BLIT_OP_SCALE)); - OUT_WFI5(ring); - - OUT_PKT4(ring, REG_A6XX_RB_DBG_ECO_CNTL, 1); - OUT_RING(ring, screen->info->a6xx.magic.RB_DBG_ECO_CNTL); + if (screen->info->a6xx.magic.RB_DBG_ECO_CNTL_blit != screen->info->a6xx.magic.RB_DBG_ECO_CNTL) { + OUT_WFI5(ring); + OUT_PKT4(ring, REG_A6XX_RB_DBG_ECO_CNTL, 1); + OUT_RING(ring, screen->info->a6xx.magic.RB_DBG_ECO_CNTL); + } fd6_event_write(batch, ring, PC_CCU_FLUSH_COLOR_TS, true); fd6_event_write(batch, ring, PC_CCU_FLUSH_DEPTH_TS, true);