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d3d12: remove d3d12_get_param and d3d12_get_paramf
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32955>
This commit is contained in:
Qiang Yu
Marge Bot
parent
90be460e05
commit
90594a00a9
1 changed files with 0 additions and 323 deletions
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@ -123,327 +123,6 @@ d3d12_get_video_mem(struct pipe_screen *pscreen)
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return static_cast<int>(screen->memory_device_size_megabytes + screen->memory_system_size_megabytes);
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}
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static int
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d3d12_get_param_default(struct pipe_screen *pscreen, enum pipe_cap param)
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{
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struct d3d12_screen *screen = d3d12_screen(pscreen);
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switch (param) {
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case PIPE_CAP_NPOT_TEXTURES:
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return 1;
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case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
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/* D3D12 only supports dual-source blending for a single
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* render-target. From the D3D11 functional spec (which also defines
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* this for D3D12):
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*
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* "When Dual Source Color Blending is enabled, the Pixel Shader must
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* have only a single RenderTarget bound, at slot 0, and must output
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* both o0 and o1. Writing to other outputs (o2, o3 etc.) produces
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* undefined results for the corresponding RenderTargets, if bound
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* illegally."
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*
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* Source: https://microsoft.github.io/DirectX-Specs/d3d/archive/D3D11_3_FunctionalSpec.htm#17.6%20Dual%20Source%20Color%20Blending
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*/
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return 1;
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case PIPE_CAP_ANISOTROPIC_FILTER:
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return 1;
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case PIPE_CAP_MAX_RENDER_TARGETS:
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return D3D12_SIMULTANEOUS_RENDER_TARGET_COUNT;
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case PIPE_CAP_TEXTURE_SWIZZLE:
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return 1;
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case PIPE_CAP_MAX_TEXEL_BUFFER_ELEMENTS_UINT:
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return 1 << D3D12_REQ_BUFFER_RESOURCE_TEXEL_COUNT_2_TO_EXP;
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case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
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return D3D12_REQ_TEXTURE2D_U_OR_V_DIMENSION;
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case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
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static_assert(D3D12_REQ_TEXTURE3D_U_V_OR_W_DIMENSION == (1 << 11),
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"D3D12_REQ_TEXTURE3D_U_V_OR_W_DIMENSION");
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return 12;
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case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
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return D3D12_REQ_MIP_LEVELS;
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case PIPE_CAP_PRIMITIVE_RESTART:
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case PIPE_CAP_INDEP_BLEND_ENABLE:
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case PIPE_CAP_INDEP_BLEND_FUNC:
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case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
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case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
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case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
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case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
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return 1;
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case PIPE_CAP_VERTEX_INPUT_ALIGNMENT:
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return PIPE_VERTEX_INPUT_ALIGNMENT_4BYTE;
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/* We need to do some lowering that requires a link to the sampler */
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case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
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return 1;
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case PIPE_CAP_NIR_IMAGES_AS_DEREF:
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return 1;
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case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
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return D3D12_REQ_TEXTURE2D_ARRAY_AXIS_DIMENSION;
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case PIPE_CAP_DEPTH_CLIP_DISABLE:
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return 1;
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case PIPE_CAP_TGSI_TEXCOORD:
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return 1;
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case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
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return 1;
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case PIPE_CAP_GLSL_FEATURE_LEVEL:
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return 460;
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case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
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return 460;
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case PIPE_CAP_ESSL_FEATURE_LEVEL:
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return 310;
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case PIPE_CAP_COMPUTE:
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return 1;
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case PIPE_CAP_TEXTURE_MULTISAMPLE:
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return 1;
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case PIPE_CAP_CUBE_MAP_ARRAY:
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return 1;
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case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
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return 1;
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case PIPE_CAP_TEXTURE_TRANSFER_MODES:
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return PIPE_TEXTURE_TRANSFER_BLIT;
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case PIPE_CAP_ENDIANNESS:
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return PIPE_ENDIAN_NATIVE; /* unsure */
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case PIPE_CAP_MAX_VIEWPORTS:
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return D3D12_VIEWPORT_AND_SCISSORRECT_OBJECT_COUNT_PER_PIPELINE;
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case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
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return 1;
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case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
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return 4;
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case PIPE_CAP_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
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case PIPE_CAP_FS_COORD_ORIGIN_UPPER_LEFT:
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return 1;
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case PIPE_CAP_ACCELERATED:
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return screen->vendor_id != HW_VENDOR_MICROSOFT;
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case PIPE_CAP_VIDEO_MEMORY:
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return d3d12_get_video_mem(pscreen);
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case PIPE_CAP_UMA:
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return screen->architecture.UMA;
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case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
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return 2048; /* FIXME: no clue how to query this */
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case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
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case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
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return 1;
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case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
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return D3D12_RAW_UAV_SRV_BYTE_ALIGNMENT;
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case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
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return D3D12_CONSTANT_BUFFER_DATA_PLACEMENT_ALIGNMENT;
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case PIPE_CAP_PCI_GROUP:
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case PIPE_CAP_PCI_BUS:
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case PIPE_CAP_PCI_DEVICE:
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case PIPE_CAP_PCI_FUNCTION:
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return 0; /* TODO: figure these out */
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case PIPE_CAP_FLATSHADE:
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case PIPE_CAP_ALPHA_TEST:
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case PIPE_CAP_TWO_SIDED_COLOR:
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case PIPE_CAP_CLIP_PLANES:
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return 0;
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case PIPE_CAP_SHADER_STENCIL_EXPORT:
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return screen->opts.PSSpecifiedStencilRefSupported;
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case PIPE_CAP_SEAMLESS_CUBE_MAP:
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case PIPE_CAP_TEXTURE_QUERY_LOD:
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case PIPE_CAP_VS_INSTANCEID:
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case PIPE_CAP_TGSI_TEX_TXF_LZ:
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case PIPE_CAP_OCCLUSION_QUERY:
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case PIPE_CAP_VIEWPORT_TRANSFORM_LOWERED:
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case PIPE_CAP_PSIZ_CLAMPED:
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case PIPE_CAP_BLEND_EQUATION_SEPARATE:
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case PIPE_CAP_CONDITIONAL_RENDER:
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case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
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case PIPE_CAP_QUERY_TIMESTAMP:
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case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
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case PIPE_CAP_IMAGE_STORE_FORMATTED:
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case PIPE_CAP_GLSL_TESS_LEVELS_AS_INPUTS:
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return 1;
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case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
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return D3D12_SO_BUFFER_SLOT_COUNT;
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case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
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case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
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return D3D12_SO_OUTPUT_COMPONENT_COUNT;
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/* Geometry shader output. */
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case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
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return D3D12_GS_MAX_OUTPUT_VERTEX_COUNT_ACROSS_INSTANCES;
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case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
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return D3D12_REQ_GS_INVOCATION_32BIT_OUTPUT_COMPONENT_LIMIT;
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case PIPE_CAP_MAX_VARYINGS:
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/* Subtract one so that implicit position can be added */
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return D3D12_PS_INPUT_REGISTER_COUNT - 1;
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case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
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if (screen->max_feature_level <= D3D_FEATURE_LEVEL_11_0)
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return D3D12_PS_CS_UAV_REGISTER_COUNT;
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if (screen->opts.ResourceBindingTier <= D3D12_RESOURCE_BINDING_TIER_2)
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return D3D12_UAV_SLOT_COUNT;
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return 0;
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case PIPE_CAP_START_INSTANCE:
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case PIPE_CAP_DRAW_PARAMETERS:
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case PIPE_CAP_DRAW_INDIRECT:
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case PIPE_CAP_MULTI_DRAW_INDIRECT:
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case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
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case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
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case PIPE_CAP_SAMPLE_SHADING:
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case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
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case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
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case PIPE_CAP_INT64:
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case PIPE_CAP_DOUBLES:
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case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
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case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
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case PIPE_CAP_MEMOBJ:
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case PIPE_CAP_FENCE_SIGNAL:
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case PIPE_CAP_TIMELINE_SEMAPHORE_IMPORT:
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case PIPE_CAP_CLIP_HALFZ:
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case PIPE_CAP_VS_LAYER_VIEWPORT:
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case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
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case PIPE_CAP_SHADER_ARRAY_COMPONENTS:
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case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
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case PIPE_CAP_QUERY_TIME_ELAPSED:
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case PIPE_CAP_FS_FINE_DERIVATIVE:
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case PIPE_CAP_CULL_DISTANCE:
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case PIPE_CAP_TEXTURE_QUERY_SAMPLES:
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case PIPE_CAP_TEXTURE_BARRIER:
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case PIPE_CAP_GL_SPIRV:
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case PIPE_CAP_POLYGON_OFFSET_CLAMP:
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case PIPE_CAP_SHADER_GROUP_VOTE:
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case PIPE_CAP_SHADER_BALLOT:
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case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
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case PIPE_CAP_QUERY_SO_OVERFLOW:
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return 1;
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case PIPE_CAP_QUERY_BUFFER_OBJECT:
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return (screen->opts3.WriteBufferImmediateSupportFlags & D3D12_COMMAND_LIST_SUPPORT_FLAG_DIRECT) != 0;
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case PIPE_CAP_MAX_VERTEX_STREAMS:
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return D3D12_SO_BUFFER_SLOT_COUNT;
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case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
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/* This is asking about varyings, not total registers, so remove the 2 tess factor registers. */
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return D3D12_HS_OUTPUT_PATCH_CONSTANT_REGISTER_COUNT - 2;
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case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
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/* Picking a value in line with other drivers. Without this, we can end up easily hitting OOM
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* if an app just creates, initializes, and destroys resources without explicitly flushing. */
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return 64 * 1024 * 1024;
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case PIPE_CAP_SAMPLER_VIEW_TARGET:
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return screen->opts12.RelaxedFormatCastingSupported;
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#ifndef _GAMING_XBOX
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case PIPE_CAP_QUERY_MEMORY_INFO:
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return 1;
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#endif
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default:
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return u_pipe_screen_get_param_defaults(pscreen, param);
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}
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}
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static int
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d3d12_get_generic_param(struct pipe_screen *pscreen, enum pipe_cap param)
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{
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struct d3d12_screen *screen = d3d12_screen(pscreen);
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switch (param) {
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case PIPE_CAP_ACCELERATED:
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return screen->vendor_id != HW_VENDOR_MICROSOFT;
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case PIPE_CAP_VIDEO_MEMORY:
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return d3d12_get_video_mem(pscreen);
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case PIPE_CAP_UMA:
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return screen->architecture.UMA;
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default:
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return 0;
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}
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}
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static int
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d3d12_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
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{
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struct d3d12_screen *screen = d3d12_screen(pscreen);
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if (screen->max_feature_level < D3D_FEATURE_LEVEL_11_0)
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return d3d12_get_generic_param(pscreen, param);
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return d3d12_get_param_default(pscreen, param);
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}
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static float
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d3d12_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
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{
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switch (param) {
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case PIPE_CAPF_MIN_LINE_WIDTH:
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case PIPE_CAPF_MIN_LINE_WIDTH_AA:
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case PIPE_CAPF_MIN_POINT_SIZE:
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case PIPE_CAPF_MIN_POINT_SIZE_AA:
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return 1;
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case PIPE_CAPF_POINT_SIZE_GRANULARITY:
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case PIPE_CAPF_LINE_WIDTH_GRANULARITY:
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return 0.1;
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case PIPE_CAPF_MAX_LINE_WIDTH:
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case PIPE_CAPF_MAX_LINE_WIDTH_AA:
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return 1.0f; /* no clue */
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case PIPE_CAPF_MAX_POINT_SIZE:
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case PIPE_CAPF_MAX_POINT_SIZE_AA:
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return D3D12_MAX_POINT_SIZE;
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case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
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return D3D12_MAX_MAXANISOTROPY;
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case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
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return 15.99f;
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case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
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case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
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case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
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return 0.0f; /* not implemented */
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default:
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unreachable("unknown pipe_capf");
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}
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return 0.0;
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}
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static int
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d3d12_get_shader_param(struct pipe_screen *pscreen,
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enum pipe_shader_type shader,
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@ -1642,8 +1321,6 @@ d3d12_init_screen_base(struct d3d12_screen *screen, struct sw_winsys *winsys, LU
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screen->base.get_vendor = d3d12_get_vendor;
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screen->base.get_device_vendor = d3d12_get_device_vendor;
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screen->base.get_screen_fd = d3d12_screen_get_fd;
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screen->base.get_param = d3d12_get_param;
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screen->base.get_paramf = d3d12_get_paramf;
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screen->base.get_shader_param = d3d12_get_shader_param;
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screen->base.get_compute_param = d3d12_get_compute_param;
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screen->base.is_format_supported = d3d12_is_format_supported;
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