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winsys/radeon: struct radeon_cmdbuf is rcs instead of cs for consistency
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33661>
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06691b9f39
commit
901f1ea8bd
3 changed files with 30 additions and 30 deletions
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@ -364,7 +364,7 @@ struct radeon_winsys {
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* \return The pointer at the beginning of the buffer.
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*/
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void *(*buffer_map)(struct radeon_winsys *ws, struct pb_buffer_lean *buf,
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struct radeon_cmdbuf *cs, enum pipe_map_flags usage);
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struct radeon_cmdbuf *rcs, enum pipe_map_flags usage);
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/**
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* Unmap a buffer object from the client's address space.
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@ -563,7 +563,7 @@ struct radeon_winsys {
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*
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* \return true on success
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*/
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bool (*cs_create)(struct radeon_cmdbuf *cs,
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bool (*cs_create)(struct radeon_cmdbuf *rcs,
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struct radeon_winsys_ctx *ctx, enum amd_ip_type amd_ip_type,
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void (*flush)(void *ctx, unsigned flags,
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struct pipe_fence_handle **fence),
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@ -576,7 +576,7 @@ struct radeon_winsys {
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* \param preamble_ib Non-preemptible preamble IB for the context.
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* \param preamble_num_dw Number of dwords in the preamble IB.
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*/
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bool (*cs_setup_preemption)(struct radeon_cmdbuf *cs, const uint32_t *preamble_ib,
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bool (*cs_setup_preemption)(struct radeon_cmdbuf *rcs, const uint32_t *preamble_ib,
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unsigned preamble_num_dw);
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/**
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@ -584,7 +584,7 @@ struct radeon_winsys {
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*
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* \param cs A command stream to destroy.
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*/
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void (*cs_destroy)(struct radeon_cmdbuf *cs);
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void (*cs_destroy)(struct radeon_cmdbuf *rcs);
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/**
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* Add a buffer. Each buffer used by a CS must be added using this function.
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@ -595,7 +595,7 @@ struct radeon_winsys {
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* \param domain Bitmask of the RADEON_DOMAIN_* flags.
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* \return Buffer index.
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*/
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unsigned (*cs_add_buffer)(struct radeon_cmdbuf *cs, struct pb_buffer_lean *buf,
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unsigned (*cs_add_buffer)(struct radeon_cmdbuf *rcs, struct pb_buffer_lean *buf,
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unsigned usage, enum radeon_bo_domain domain);
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/**
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@ -608,7 +608,7 @@ struct radeon_winsys {
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* \param buf Buffer
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* \return The buffer index, or -1 if the buffer has not been added.
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*/
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int (*cs_lookup_buffer)(struct radeon_cmdbuf *cs, struct pb_buffer_lean *buf);
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int (*cs_lookup_buffer)(struct radeon_cmdbuf *rcs, struct pb_buffer_lean *buf);
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/**
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* Return true if there is enough memory in VRAM and GTT for the buffers
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@ -618,7 +618,7 @@ struct radeon_winsys {
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*
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* \param cs A command stream to validate.
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*/
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bool (*cs_validate)(struct radeon_cmdbuf *cs);
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bool (*cs_validate)(struct radeon_cmdbuf *rcs);
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/**
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* Check whether the given number of dwords is available in the IB.
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@ -628,7 +628,7 @@ struct radeon_winsys {
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* \param dw Number of CS dwords requested by the caller.
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* \return true if there is enough space
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*/
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bool (*cs_check_space)(struct radeon_cmdbuf *cs, unsigned dw);
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bool (*cs_check_space)(struct radeon_cmdbuf *rcs, unsigned dw);
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/**
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* Return the buffer list.
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@ -640,7 +640,7 @@ struct radeon_winsys {
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* \param list Returned buffer list. Set to NULL to query the count only.
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* \return The buffer count.
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*/
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unsigned (*cs_get_buffer_list)(struct radeon_cmdbuf *cs, struct radeon_bo_list_item *list);
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unsigned (*cs_get_buffer_list)(struct radeon_cmdbuf *rcs, struct radeon_bo_list_item *list);
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/**
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* Flush a command stream.
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@ -652,7 +652,7 @@ struct radeon_winsys {
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* \return Negative POSIX error code or 0 for success.
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* Asynchronous submissions never return an error.
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*/
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int (*cs_flush)(struct radeon_cmdbuf *cs, unsigned flags, struct pipe_fence_handle **fence);
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int (*cs_flush)(struct radeon_cmdbuf *rcs, unsigned flags, struct pipe_fence_handle **fence);
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/**
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* Create a fence before the CS is flushed.
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@ -661,7 +661,7 @@ struct radeon_winsys {
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* The fence must not be used for anything except \ref cs_add_fence_dependency
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* before the flush.
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*/
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struct pipe_fence_handle *(*cs_get_next_fence)(struct radeon_cmdbuf *cs);
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struct pipe_fence_handle *(*cs_get_next_fence)(struct radeon_cmdbuf *rcs);
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/**
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* Return true if a buffer is referenced by a command stream.
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@ -669,7 +669,7 @@ struct radeon_winsys {
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* \param cs A command stream.
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* \param buf A winsys buffer.
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*/
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bool (*cs_is_buffer_referenced)(struct radeon_cmdbuf *cs, struct pb_buffer_lean *buf,
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bool (*cs_is_buffer_referenced)(struct radeon_cmdbuf *rcs, struct pb_buffer_lean *buf,
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unsigned usage);
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/**
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@ -679,29 +679,29 @@ struct radeon_winsys {
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* \param fid Feature ID, one of RADEON_FID_*
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* \param enable Whether to enable or disable the feature.
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*/
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bool (*cs_request_feature)(struct radeon_cmdbuf *cs, enum radeon_feature_id fid, bool enable);
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bool (*cs_request_feature)(struct radeon_cmdbuf *rcs, enum radeon_feature_id fid, bool enable);
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/**
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* Make sure all asynchronous flush of the cs have completed
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*
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* \param cs A command stream.
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*/
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void (*cs_sync_flush)(struct radeon_cmdbuf *cs);
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void (*cs_sync_flush)(struct radeon_cmdbuf *rcs);
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/**
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* Add a fence dependency to the CS, so that the CS will wait for
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* the fence before execution.
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*/
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void (*cs_add_fence_dependency)(struct radeon_cmdbuf *cs, struct pipe_fence_handle *fence);
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void (*cs_add_fence_dependency)(struct radeon_cmdbuf *rcs, struct pipe_fence_handle *fence);
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/**
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* Signal a syncobj when the CS finishes execution.
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*/
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void (*cs_add_syncobj_signal)(struct radeon_cmdbuf *cs, struct pipe_fence_handle *fence);
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void (*cs_add_syncobj_signal)(struct radeon_cmdbuf *rcs, struct pipe_fence_handle *fence);
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/**
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* Returns the amd_ip_type type of a CS.
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*/
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enum amd_ip_type (*cs_get_ip_type)(struct radeon_cmdbuf *cs);
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enum amd_ip_type (*cs_get_ip_type)(struct radeon_cmdbuf *rcs);
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/**
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* Wait for the fence and return true if the fence has been signalled.
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@ -760,35 +760,35 @@ struct radeon_winsys {
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/**
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* Secure context
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*/
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bool (*cs_is_secure)(struct radeon_cmdbuf *cs);
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bool (*cs_is_secure)(struct radeon_cmdbuf *rcs);
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/**
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* Stable pstate
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*/
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bool (*cs_set_pstate)(struct radeon_cmdbuf *cs, enum radeon_ctx_pstate state);
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bool (*cs_set_pstate)(struct radeon_cmdbuf *rcs, enum radeon_ctx_pstate state);
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/**
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* Pass the VAs to the buffers where various information is saved by the FW during mcbp.
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*/
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void (*cs_set_mcbp_reg_shadowing_va)(struct radeon_cmdbuf *cs, uint64_t regs_va,
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void (*cs_set_mcbp_reg_shadowing_va)(struct radeon_cmdbuf *rcs, uint64_t regs_va,
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uint64_t csa_va);
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};
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static inline bool radeon_emitted(struct radeon_cmdbuf *cs, unsigned num_dw)
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static inline bool radeon_emitted(struct radeon_cmdbuf *rcs, unsigned num_dw)
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{
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return cs && (cs->prev_dw + cs->current.cdw > num_dw);
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return rcs && (rcs->prev_dw + rcs->current.cdw > num_dw);
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}
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static inline void radeon_emit(struct radeon_cmdbuf *cs, uint32_t value)
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static inline void radeon_emit(struct radeon_cmdbuf *rcs, uint32_t value)
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{
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cs->current.buf[cs->current.cdw++] = value;
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rcs->current.buf[rcs->current.cdw++] = value;
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}
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static inline void radeon_emit_array(struct radeon_cmdbuf *cs, const uint32_t *values,
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static inline void radeon_emit_array(struct radeon_cmdbuf *rcs, const uint32_t *values,
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unsigned count)
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{
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memcpy(cs->current.buf + cs->current.cdw, values, count * 4);
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cs->current.cdw += count;
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memcpy(rcs->current.buf + rcs->current.cdw, values, count * 4);
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rcs->current.cdw += count;
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}
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static inline bool radeon_uses_secure_bos(struct radeon_winsys* ws)
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@ -831,7 +831,7 @@ static struct pipe_fence_handle *radeon_drm_cs_get_next_fence(struct radeon_cmdb
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}
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static void
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radeon_drm_cs_add_fence_dependency(struct radeon_cmdbuf *cs,
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radeon_drm_cs_add_fence_dependency(struct radeon_cmdbuf *rcs,
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struct pipe_fence_handle *fence)
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{
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/* TODO: Handle the following unlikely multi-threaded scenario:
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@ -840,12 +840,12 @@ static void radeon_pin_threads_to_L3_cache(struct radeon_winsys *ws,
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}
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}
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static bool radeon_cs_is_secure(struct radeon_cmdbuf* cs)
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static bool radeon_cs_is_secure(struct radeon_cmdbuf* rcs)
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{
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return false;
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}
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static bool radeon_cs_set_pstate(struct radeon_cmdbuf* cs, enum radeon_ctx_pstate state)
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static bool radeon_cs_set_pstate(struct radeon_cmdbuf* rcs, enum radeon_ctx_pstate state)
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{
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return false;
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}
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