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synced 2026-04-12 02:40:35 +02:00
radeon/r200 remove more unused code
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parent
b584b0728d
commit
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2 changed files with 7 additions and 42 deletions
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@ -169,40 +169,6 @@ do { \
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#define ELTS_BUFSZ(nr) (12 + nr * 2)
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#define VBUF_BUFSZ (3 * sizeof(int))
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/* Ensure that a minimum amount of space is available in the command buffer.
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* This is used to ensure atomicity of state updates with the rendering requests
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* that rely on them.
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*
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* An alternative would be to implement a "soft lock" such that when the buffer
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* wraps at an inopportune time, we grab the lock, flush the current buffer,
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* and hang on to the lock until the critical section is finished and we flush
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* the buffer again and unlock.
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*/
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#if 0
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static INLINE void r200EnsureCmdBufSpace( r200ContextPtr rmesa, int bytes )
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{
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if (rmesa->store.cmd_used + bytes > R200_CMD_BUF_SZ)
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rcommonFlushCmdBuf( rmesa, __FUNCTION__ );
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assert( bytes <= R200_CMD_BUF_SZ );
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}
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/* Alloc space in the command buffer
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*/
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static INLINE char *r200AllocCmdBuf( r200ContextPtr rmesa,
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int bytes, const char *where )
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{
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char * head;
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if (rmesa->store.cmd_used + bytes > R200_CMD_BUF_SZ)
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r200FlushCmdBuf( rmesa, where );
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head = rmesa->store.cmd_buf + rmesa->store.cmd_used;
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rmesa->store.cmd_used += bytes;
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assert( rmesa->store.cmd_used <= R200_CMD_BUF_SZ );
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return head;
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}
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#endif
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static inline uint32_t cmdpacket3(int cmd_type)
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{
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drm_radeon_cmd_header_t cmd;
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@ -60,8 +60,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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#define RADEON_IDLE_RETRY 16
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static int radeonFlushCmdBufLocked( r100ContextPtr rmesa,
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const char * caller );
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static void print_state_atom( struct radeon_state_atom *state )
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{
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@ -123,7 +121,7 @@ static void radeonBackUpAndEmitLostStateLocked( r100ContextPtr rmesa )
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saved_store = rmesa->store;
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rmesa->radeon.dma.nr_released_bufs = 0;
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rmesa->store = rmesa->backup_store;
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radeonFlushCmdBufLocked( rmesa, __FUNCTION__ );
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rcommonFlushCmdBufLocked( &rmesa->radeon, __FUNCTION__ );
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rmesa->radeon.dma.nr_released_bufs = nr_released_bufs;
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rmesa->store = saved_store;
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}
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@ -310,7 +308,6 @@ GLushort *radeonAllocEltsOpenEnded( r100ContextPtr rmesa,
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GLuint primitive,
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GLuint min_nr )
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{
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drm_radeon_cmd_header_t *cmd;
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GLushort *retval;
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if (RADEON_DEBUG & DEBUG_IOCTL)
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@ -330,15 +327,15 @@ GLushort *radeonAllocEltsOpenEnded( r100ContextPtr rmesa,
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retval = rmesa->tcl.elt_dma_bo->ptr + rmesa->tcl.elt_dma_offset;
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if (RADEON_DEBUG & DEBUG_PRIMS)
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fprintf(stderr, "%s: header 0x%x vfmt 0x%x prim %x \n",
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fprintf(stderr, "%s: header vfmt 0x%x prim %x \n",
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__FUNCTION__,
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cmd[1].i, vertex_format, primitive);
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vertex_format, primitive);
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assert(!rmesa->radeon.dma.flush);
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rmesa->radeon.glCtx->Driver.NeedFlush |= FLUSH_STORED_VERTICES;
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rmesa->radeon.dma.flush = radeonFlushElts;
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rmesa->store.elts_start = ((char *)cmd) - rmesa->store.cmd_buf;
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// rmesa->store.elts_start = ((char *)cmd) - rmesa->store.cmd_buf;
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return retval;
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}
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@ -424,6 +421,8 @@ void radeonEmitAOS( r100ContextPtr rmesa,
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#endif
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}
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/* using already shifted color_fmt! */
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void radeonEmitBlit( r100ContextPtr rmesa, /* FIXME: which drmMinor is required? */
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GLuint color_fmt,
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@ -600,7 +599,7 @@ static void radeonClear( GLcontext *ctx, GLbitfield mask )
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}
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/* Send current state to the hardware */
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radeonFlushCmdBufLocked( rmesa, __FUNCTION__ );
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rcommonFlushCmdBufLocked( &rmesa->radeon, __FUNCTION__ );
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for ( i = 0 ; i < dPriv->numClipRects ; ) {
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GLint nr = MIN2( i + RADEON_NR_SAREA_CLIPRECTS, dPriv->numClipRects );
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