From 8f798cc9115805fd5660875889ed51a540506823 Mon Sep 17 00:00:00 2001 From: Francisco Jerez Date: Wed, 24 Aug 2022 11:27:52 -0700 Subject: [PATCH] intel/brw/xe2+: Fix indirect extended descriptor setup for scratch space. Reviewed-by: Lionel Landwerlin Part-of: --- src/intel/compiler/brw_eu_emit.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c index eaf20ffdd8e..efd632bde99 100644 --- a/src/intel/compiler/brw_eu_emit.c +++ b/src/intel/compiler/brw_eu_emit.c @@ -1550,14 +1550,22 @@ brw_send_indirect_split_message(struct brw_codegen *p, unsigned imm_part = ex_bso ? 0 : (ex_desc_imm | sfid | eot << 5); if (ex_desc_scratch) { - /* Or the scratch surface offset together with the immediate part of - * the extended descriptor. - */ assert(devinfo->verx10 >= 125); brw_AND(p, addr, retype(brw_vec1_grf(0, 5), BRW_TYPE_UD), brw_imm_ud(INTEL_MASK(31, 10))); - brw_OR(p, addr, addr, brw_imm_ud(imm_part)); + + if (devinfo->ver >= 20 && sfid == GFX12_SFID_UGM) { + const unsigned ex_mlen = brw_message_ex_desc_ex_mlen(devinfo, ex_desc_imm); + assert(ex_desc_imm == brw_message_ex_desc(devinfo, ex_mlen)); + brw_SHR(p, addr, addr, brw_imm_ud(4)); + } else { + /* Or the scratch surface offset together with the immediate part + * of the extended descriptor. + */ + brw_OR(p, addr, addr, brw_imm_ud(imm_part)); + } + } else if (ex_desc.file == BRW_IMMEDIATE_VALUE) { /* ex_desc bits 15:12 don't exist in the instruction encoding prior * to Gfx12, so we may have fallen back to an indirect extended