radeonsi: fix shader culling with integer pixel centers

Only Nine was using them.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13700>
This commit is contained in:
Marek Olšák 2021-11-05 23:31:07 -04:00 committed by Marge Bot
parent 185826a400
commit 8f687bb5dc
2 changed files with 10 additions and 0 deletions

View file

@ -1108,6 +1108,10 @@ static void si_bind_rs_state(struct pipe_context *ctx, void *state)
si_mark_atom_dirty(sctx, &sctx->atoms.s.ngg_cull_state);
}
if (sctx->screen->use_ngg_culling &&
old_rs->half_pixel_center != rs->half_pixel_center)
si_mark_atom_dirty(sctx, &sctx->atoms.s.ngg_cull_state);
sctx->current_vs_state &= C_VS_STATE_CLAMP_VERTEX_COLOR;
sctx->current_vs_state |= S_VS_STATE_CLAMP_VERTEX_COLOR(rs->clamp_vertex_color);

View file

@ -55,6 +55,12 @@ void si_get_small_prim_cull_info(struct si_context *sctx, struct si_small_prim_c
info.translate[1] = -info.translate[1];
}
/* This is what the hardware does. */
if (!sctx->queued.named.rasterizer->half_pixel_center) {
info.translate[0] += 0.5;
info.translate[1] += 0.5;
}
/* Scale the framebuffer up, so that samples become pixels and small
* primitive culling is the same for all sample counts.
* This only works with the standard DX sample positions, because