diff --git a/src/amd/common/ac_vcn_enc.h b/src/amd/common/ac_vcn_enc.h
index fd68ba27044..46555a0befa 100644
--- a/src/amd/common/ac_vcn_enc.h
+++ b/src/amd/common/ac_vcn_enc.h
@@ -96,6 +96,8 @@
 #define RENCODE_HEVC_HEADER_INSTRUCTION_SLICE_QP_DELTA                              0x00010003
 #define RENCODE_HEVC_HEADER_INSTRUCTION_SAO_ENABLE                                  0x00010004
 #define RENCODE_HEVC_HEADER_INSTRUCTION_LOOP_FILTER_ACROSS_SLICES_ENABLE            0x00010005
+#define RENCODE_HEVC_HEADER_INSTRUCTION_SLICE_SEGMENT_ADDRESS                       0x00010006
+#define RENCODE_HEVC_HEADER_INSTRUCTION_DEPENDENT_SLICE_SEGMENT_FLAG                0x00010007
 
 #define RENCODE_H264_HEADER_INSTRUCTION_FIRST_MB                                    0x00020000
 #define RENCODE_H264_HEADER_INSTRUCTION_SLICE_QP_DELTA                              0x00020001
diff --git a/src/gallium/drivers/radeonsi/radeon_vcn_enc.c b/src/gallium/drivers/radeonsi/radeon_vcn_enc.c
index d1d0e2c4bf5..5f377c68418 100644
--- a/src/gallium/drivers/radeonsi/radeon_vcn_enc.c
+++ b/src/gallium/drivers/radeonsi/radeon_vcn_enc.c
@@ -2034,10 +2034,14 @@ struct pipe_video_codec *radeon_create_encoder(struct pipe_context *context,
          /* this limits tile splitting scheme to use legacy method */
          enc->enc_pic.av1_tile_splitting_legacy_flag = true;
       }
+      if (sscreen->info.vcn_enc_minor_version >= 8)
+         enc->enc_pic.has_dependent_slice_instructions = true;
    }
    else if (sscreen->info.vcn_ip_version >= VCN_4_0_0) {
       if (sscreen->info.vcn_enc_minor_version >= 1)
          enc->enc_pic.use_rc_per_pic_ex = true;
+      if (sscreen->info.vcn_enc_minor_version >= 23)
+         enc->enc_pic.has_dependent_slice_instructions = true;
       radeon_enc_4_0_init(enc);
    }
    else if (sscreen->info.vcn_ip_version >= VCN_3_0_0) {
diff --git a/src/gallium/drivers/radeonsi/radeon_vcn_enc.h b/src/gallium/drivers/radeonsi/radeon_vcn_enc.h
index 3a22f696696..ba262c33f9b 100644
--- a/src/gallium/drivers/radeonsi/radeon_vcn_enc.h
+++ b/src/gallium/drivers/radeonsi/radeon_vcn_enc.h
@@ -109,6 +109,7 @@ struct radeon_enc_pic {
 
    bool use_rc_per_pic_ex;
    bool av1_tile_splitting_legacy_flag;
+   bool has_dependent_slice_instructions;
 
    struct {
       union {
diff --git a/src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c b/src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c
index f21c8c525e8..03ebd6dcb73 100644
--- a/src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c
+++ b/src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c
@@ -469,7 +469,9 @@ unsigned int radeon_enc_write_pps_hevc(struct radeon_encoder *enc, uint8_t *out)
    radeon_bs_set_emulation_prevention(&bs, true);
    radeon_bs_code_ue(&bs, 0x0); /* pps_pic_parameter_set_id */
    radeon_bs_code_ue(&bs, 0x0); /* pps_seq_parameter_set_id */
-   radeon_bs_code_fixed_bits(&bs, 0x1, 1); /* dependent_slice_segments_enabled_flag */
+   unsigned dependent_slice_segments_enabled_flag =
+      enc->enc_pic.has_dependent_slice_instructions ? pps->dependent_slice_segments_enabled_flag : 0x1;
+   radeon_bs_code_fixed_bits(&bs, dependent_slice_segments_enabled_flag, 1);
    radeon_bs_code_fixed_bits(&bs, pps->output_flag_present_flag, 1);
    radeon_bs_code_fixed_bits(&bs, 0x0, 3); /* num_extra_slice_header_bits */
    radeon_bs_code_fixed_bits(&bs, 0x0, 1); /* sign_data_hiding_enabled_flag */
@@ -781,8 +783,17 @@ static void radeon_enc_slice_header_hevc(struct radeon_encoder *enc)
    bits_copied = bs.bits_output;
    inst_index++;
 
-   instruction[inst_index] = RENCODE_HEVC_HEADER_INSTRUCTION_SLICE_SEGMENT;
-   inst_index++;
+   if (enc->enc_pic.has_dependent_slice_instructions) {
+      if (pps->dependent_slice_segments_enabled_flag) {
+         instruction[inst_index] = RENCODE_HEVC_HEADER_INSTRUCTION_DEPENDENT_SLICE_SEGMENT_FLAG;
+         inst_index++;
+      }
+      instruction[inst_index] = RENCODE_HEVC_HEADER_INSTRUCTION_SLICE_SEGMENT_ADDRESS;
+      inst_index++;
+   } else {
+      instruction[inst_index] = RENCODE_HEVC_HEADER_INSTRUCTION_SLICE_SEGMENT;
+      inst_index++;
+   }
 
    instruction[inst_index] = RENCODE_HEVC_HEADER_INSTRUCTION_DEPENDENT_SLICE_END;
    inst_index++;