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nouveau/mme: Add a test for MME Shadow RAM behavior
Add a test to prove MME Shadow RAM behavior. Signed-off-by: Mary Guillemard <mary@mary.zone> Reviewed-by: Mel Henning <mhenning@darkrefraction.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41506>
This commit is contained in:
Mary Guillemard
parent
8a1092712c
commit
8f272b1fe1
2 changed files with 170 additions and 0 deletions
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@ -67,6 +67,22 @@ if with_tests and not with_platform_android
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install : false,
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)
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executable(
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'mme_common_hw_test',
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files('tests/mme_runner.cpp', 'tests/mme_common_hw_test.cpp'),
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gnu_symbol_visibility : 'hidden',
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include_directories : [inc_include, inc_src],
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dependencies : [
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dep_libdrm,
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idep_gtest,
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idep_mesautil,
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idep_nvidia_headers,
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idep_nouveau_mme,
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idep_nouveau_ws
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],
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install : false,
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)
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executable(
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'mme_tu104_sim_hw_test',
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files('tests/mme_runner.cpp', 'tests/mme_tu104_sim_hw_test.cpp'),
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154
src/nouveau/mme/tests/mme_common_hw_test.cpp
Normal file
154
src/nouveau/mme/tests/mme_common_hw_test.cpp
Normal file
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@ -0,0 +1,154 @@
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/*
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* Copyright 2026 Valve Corporation.
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* SPDX-License-Identifier: MIT
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*/
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#include "mme_runner.h"
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#include "nv_push_clc597.h"
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class mme_common_hw_test : public ::testing::Test, public mme_hw_runner {
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public:
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mme_common_hw_test();
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~mme_common_hw_test();
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void SetUp();
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};
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mme_common_hw_test::mme_common_hw_test() :
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::testing::Test(),
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mme_hw_runner()
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{ }
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mme_common_hw_test::~mme_common_hw_test()
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{ }
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void
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mme_common_hw_test::SetUp()
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{
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ASSERT_TRUE(set_up_hw(FERMI_A, UINT16_MAX));
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}
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/* This test exist to prove the following assumption on MME Shadow RAM control modes:
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* - "TRACK" will compare the value in shadow RAM with the value provided,
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* perform the method write only if it mismatch and update the shadow RAM
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* value.
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* - "PASSTHROUGH" will directly update the method and bypass the MME shadow RAM
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* entirely (nothing is tracked or checked against)
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* - "REPLAY" pull the value from the shadow RAM and ignore the value provided.
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*/
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TEST_F(mme_common_hw_test, mme_shadow_ram_control_behaviors)
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{
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/* We build a very simple macro to read the value of NV9097_SET_POINT_SIZE */
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mme_builder b;
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mme_builder_init(&b, devinfo);
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mme_value offset = mme_load(&b);
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struct mme_value64 addr = mme_mov64(&b, mme_imm64(data_addr));
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mme_add64_to(&b, addr, addr, mme_value64(offset, mme_zero()));
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struct mme_value scratch = mme_state(&b, NV9097_SET_POINT_SIZE);
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mme_store(&b, addr, scratch, false);
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auto macro = mme_builder_finish_vec(&b);
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reset_push();
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push_macro(0, macro);
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/* First verify that "TRACK" and "TRACK_WITH_FILTER" store a copy in shadow RAM */
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P_IMMD(p, NV9097, SET_MME_SHADOW_RAM_CONTROL, MODE_METHOD_TRACK);
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P_IMMD(p, NV9097, SET_POINT_SIZE, 0);
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P_1INC(p, NV9097, CALL_MME_MACRO(0));
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P_INLINE_DATA(p, 0x00);
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P_IMMD(p, NV9097, SET_MME_SHADOW_RAM_CONTROL, MODE_METHOD_TRACK_WITH_FILTER);
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P_IMMD(p, NV9097, SET_POINT_SIZE, 1);
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P_1INC(p, NV9097, CALL_MME_MACRO(0));
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P_INLINE_DATA(p, 0x04);
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/* Verify that "PASSTHROUGH" bypass the shadow RAM */
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P_IMMD(p, NV9097, SET_MME_SHADOW_RAM_CONTROL, MODE_METHOD_PASSTHROUGH);
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P_IMMD(p, NV9097, SET_POINT_SIZE, 2);
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P_1INC(p, NV9097, CALL_MME_MACRO(0));
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P_INLINE_DATA(p, 0x08);
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/* Verify that "REPLAY" does not touch the value in shadow RAM and read it */
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P_IMMD(p, NV9097, SET_MME_SHADOW_RAM_CONTROL, MODE_METHOD_REPLAY);
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P_IMMD(p, NV9097, SET_POINT_SIZE, 3);
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/* Ensure to restore the control state here to avoid any issues */
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P_IMMD(p, NV9097, SET_MME_SHADOW_RAM_CONTROL, MODE_METHOD_TRACK_WITH_FILTER);
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P_1INC(p, NV9097, CALL_MME_MACRO(0));
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P_INLINE_DATA(p, 0x0C);
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/* Now we still need to prove a few things and will use a report semaphore for it */
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uint64_t report_addr = data_addr + 4 * sizeof(uint32_t);
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/* First do a sanity semaphore write */
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P_IMMD(p, NV9097, SET_MME_SHADOW_RAM_CONTROL, MODE_METHOD_TRACK_WITH_FILTER);
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P_MTHD(p, NV9097, SET_REPORT_SEMAPHORE_A);
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P_NV9097_SET_REPORT_SEMAPHORE_A(p, high32(report_addr));
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P_NV9097_SET_REPORT_SEMAPHORE_B(p, low32(report_addr));
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P_NV9097_SET_REPORT_SEMAPHORE_C(p, 4);
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P_NV9097_SET_REPORT_SEMAPHORE_D(p, {
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.operation = OPERATION_RELEASE,
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.release = RELEASE_AFTER_ALL_PRECEEDING_WRITES_COMPLETE,
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.pipeline_location = PIPELINE_LOCATION_ALL,
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.structure_size = STRUCTURE_SIZE_ONE_WORD,
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});
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report_addr += sizeof(uint32_t);
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/* Now we test "PASSTHROUGH" actually perform the operation */
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P_IMMD(p, NV9097, SET_MME_SHADOW_RAM_CONTROL, MODE_METHOD_PASSTHROUGH);
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P_MTHD(p, NV9097, SET_REPORT_SEMAPHORE_A);
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P_NV9097_SET_REPORT_SEMAPHORE_A(p, high32(report_addr));
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P_NV9097_SET_REPORT_SEMAPHORE_B(p, low32(report_addr));
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P_NV9097_SET_REPORT_SEMAPHORE_C(p, 5);
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P_NV9097_SET_REPORT_SEMAPHORE_D(p, {
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.operation = OPERATION_RELEASE,
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.release = RELEASE_AFTER_ALL_PRECEEDING_WRITES_COMPLETE,
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.pipeline_location = PIPELINE_LOCATION_ALL,
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.structure_size = STRUCTURE_SIZE_ONE_WORD,
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});
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report_addr += sizeof(uint32_t);
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/* At this point we have NV9097_SET_REPORT_SEMAPHORE_C=4 in MME Shadow RAM.
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* We are now going to prove that "REPLAY" will use values in Shadow RAM.
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*
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* Instead of proving it with NV9097_SET_REPORT_SEMAPHORE_C=4, we are going
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* to use the semaphore address as on pre-Pascal "REPLAY" on
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* NV9097_SET_REPORT_SEMAPHORE is quite buggy and appear to also not properly
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* respect "PASSTHROUGH" mode.
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*/
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/* First we write the address we want */
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P_IMMD(p, NV9097, SET_MME_SHADOW_RAM_CONTROL, MODE_METHOD_TRACK);
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P_MTHD(p, NV9097, SET_REPORT_SEMAPHORE_A);
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P_NV9097_SET_REPORT_SEMAPHORE_A(p, high32(report_addr));
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P_NV9097_SET_REPORT_SEMAPHORE_B(p, low32(report_addr));
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report_addr += sizeof(uint32_t);
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/* Now we replay the address with something different than before */
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P_IMMD(p, NV9097, SET_MME_SHADOW_RAM_CONTROL, MODE_METHOD_REPLAY);
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P_MTHD(p, NV9097, SET_REPORT_SEMAPHORE_A);
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P_NV9097_SET_REPORT_SEMAPHORE_A(p, high32(report_addr));
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P_NV9097_SET_REPORT_SEMAPHORE_B(p, low32(report_addr));
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/* Now trigger the actual semaphore write with the value we want */
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P_IMMD(p, NV9097, SET_MME_SHADOW_RAM_CONTROL, MODE_METHOD_TRACK);
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P_MTHD(p, NV9097, SET_REPORT_SEMAPHORE_C);
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P_NV9097_SET_REPORT_SEMAPHORE_C(p, 6);
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P_NV9097_SET_REPORT_SEMAPHORE_D(p, {
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.operation = OPERATION_RELEASE,
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.release = RELEASE_AFTER_ALL_PRECEEDING_WRITES_COMPLETE,
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.pipeline_location = PIPELINE_LOCATION_ALL,
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.structure_size = STRUCTURE_SIZE_ONE_WORD,
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});
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report_addr += sizeof(uint32_t);
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/* Submit and verify the values */
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submit_push();
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ASSERT_EQ(data[0], 0);
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ASSERT_EQ(data[1], 1);
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ASSERT_EQ(data[2], 1);
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ASSERT_EQ(data[3], 1);
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ASSERT_EQ(data[4], 4);
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ASSERT_EQ(data[5], 5);
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ASSERT_EQ(data[6], 6);
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}
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