From 8f16e2430f227f86c039d71c84f7487367614002 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Tapani=20P=C3=A4lli?= Date: Wed, 28 Aug 2024 07:19:51 +0300 Subject: [PATCH] anv: add plumbing/support for L3 fabric flush MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: mesa-stable Signed-off-by: Tapani Pälli Reviewed-by: Nanley Chery Reviewed-by: Lionel Landwerlin Part-of: (cherry picked from commit e3814dee1ac0f90771b921a4f6f5aed10f06e8d4) --- .pick_status.json | 2 +- src/intel/vulkan/anv_private.h | 6 +++++- src/intel/vulkan/anv_util.c | 2 ++ src/intel/vulkan/anv_utrace.c | 1 + src/intel/vulkan/genX_cmd_buffer.c | 2 ++ 5 files changed, 11 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index a32c31c7c5c..f8e5e2cf9d0 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -34,7 +34,7 @@ "description": "anv: add plumbing/support for L3 fabric flush", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index 117cc6505f2..3fecd622294 100644 --- a/src/intel/vulkan/anv_private.h +++ b/src/intel/vulkan/anv_private.h @@ -3336,6 +3336,9 @@ enum anv_pipe_bits { * implement a workaround for Gfx9. */ ANV_PIPE_POST_SYNC_BIT = (1 << 24), + + /* L3 Fabric Flush */ + ANV_PIPE_L3_FABRIC_FLUSH_BIT = (1 << 25), }; /* These bits track the state of buffer writes for queries. They get cleared @@ -3398,7 +3401,8 @@ enum anv_query_bits { ANV_PIPE_HDC_PIPELINE_FLUSH_BIT | \ ANV_PIPE_UNTYPED_DATAPORT_CACHE_FLUSH_BIT | \ ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT | \ - ANV_PIPE_TILE_CACHE_FLUSH_BIT) + ANV_PIPE_TILE_CACHE_FLUSH_BIT | \ + ANV_PIPE_L3_FABRIC_FLUSH_BIT) #define ANV_PIPE_STALL_BITS ( \ ANV_PIPE_STALL_AT_SCOREBOARD_BIT | \ diff --git a/src/intel/vulkan/anv_util.c b/src/intel/vulkan/anv_util.c index a9f82ef200d..1003c8a5906 100644 --- a/src/intel/vulkan/anv_util.c +++ b/src/intel/vulkan/anv_util.c @@ -69,6 +69,8 @@ anv_dump_pipe_bits(enum anv_pipe_bits bits, FILE *f) fputs("+rt_flush ", f); if (bits & ANV_PIPE_TILE_CACHE_FLUSH_BIT) fputs("+tile_flush ", f); + if (bits & ANV_PIPE_L3_FABRIC_FLUSH_BIT) + fputs("+l3_fabric_flush ", f); if (bits & ANV_PIPE_STATE_CACHE_INVALIDATE_BIT) fputs("+state_inval ", f); if (bits & ANV_PIPE_CONSTANT_CACHE_INVALIDATE_BIT) diff --git a/src/intel/vulkan/anv_utrace.c b/src/intel/vulkan/anv_utrace.c index 9f3a6303294..9c4d01bbc33 100644 --- a/src/intel/vulkan/anv_utrace.c +++ b/src/intel/vulkan/anv_utrace.c @@ -494,6 +494,7 @@ anv_pipe_flush_bit_to_ds_stall_flag(enum anv_pipe_bits bits) { .anv = ANV_PIPE_DEPTH_CACHE_FLUSH_BIT, .ds = INTEL_DS_DEPTH_CACHE_FLUSH_BIT, }, { .anv = ANV_PIPE_DATA_CACHE_FLUSH_BIT, .ds = INTEL_DS_DATA_CACHE_FLUSH_BIT, }, { .anv = ANV_PIPE_TILE_CACHE_FLUSH_BIT, .ds = INTEL_DS_TILE_CACHE_FLUSH_BIT, }, + { .anv = ANV_PIPE_L3_FABRIC_FLUSH_BIT, .ds = INTEL_DS_L3_FABRIC_FLUSH_BIT, }, { .anv = ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT, .ds = INTEL_DS_RENDER_TARGET_CACHE_FLUSH_BIT, }, { .anv = ANV_PIPE_STATE_CACHE_INVALIDATE_BIT, .ds = INTEL_DS_STATE_CACHE_INVALIDATE_BIT, }, { .anv = ANV_PIPE_CONSTANT_CACHE_INVALIDATE_BIT, .ds = INTEL_DS_CONST_CACHE_INVALIDATE_BIT, }, diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index 86b5754b0c6..17ceb83228c 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -53,6 +53,7 @@ convert_pc_to_bits(struct GENX(PIPE_CONTROL) *pc) { #endif #if GFX_VER == 12 bits |= (pc->TileCacheFlushEnable) ? ANV_PIPE_TILE_CACHE_FLUSH_BIT : 0; + bits |= (pc->L3FabricFlush) ? ANV_PIPE_L3_FABRIC_FLUSH_BIT : 0; #endif #if GFX_VER >= 12 bits |= (pc->HDCPipelineFlushEnable) ? ANV_PIPE_HDC_PIPELINE_FLUSH_BIT : 0; @@ -2550,6 +2551,7 @@ genX(batch_emit_pipe_control_write)(struct anv_batch *batch, #endif #if GFX_VER == 12 pipe.TileCacheFlushEnable = bits & ANV_PIPE_TILE_CACHE_FLUSH_BIT; + pipe.L3FabricFlush = bits & ANV_PIPE_L3_FABRIC_FLUSH_BIT; #endif #if GFX_VER > 11 pipe.HDCPipelineFlushEnable = bits & ANV_PIPE_HDC_PIPELINE_FLUSH_BIT;