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radv: Add support for IB annotations

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Wires up ac_parse_ib annotation support.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27549>
This commit is contained in:
Konstantin Seurer 2024-02-04 18:09:04 +01:00 • committed by Marge Bot
parent bf15688fa1
commit 8f0ee3a92b
4 changed files with 52 additions and 2 deletions
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6
src/amd/vulkan/radv_cmd_buffer.c
View file

@ -607,6 +607,12 @@ radv_cmd_buffer_trace_emit(struct radv_cmd_buffer *cmd_buffer)
radeon_emit(cs, AC_ENCODE_TRACE_POINT(cmd_buffer->state.trace_id));
}
void
radv_cmd_buffer_annotate(struct radv_cmd_buffer *cmd_buffer, const char *annotation)
{
cmd_buffer->device->ws->cs_annotate(cmd_buffer->cs, annotation);
}
static void
radv_gang_barrier(struct radv_cmd_buffer *cmd_buffer, VkPipelineStageFlags2 src_stage_mask,
VkPipelineStageFlags2 dst_stage_mask)

3
src/amd/vulkan/radv_private.h
View file

@ -2128,6 +2128,9 @@ enum radv_cmd_flush_bits radv_dst_access_flush(struct radv_cmd_buffer *cmd_buffe
void radv_write_timestamp(struct radv_cmd_buffer *cmd_buffer, uint64_t va, VkPipelineStageFlags2 stage);
void radv_cmd_buffer_trace_emit(struct radv_cmd_buffer *cmd_buffer);
void radv_cmd_buffer_annotate(struct radv_cmd_buffer *cmd_buffer, const char *annotation);
bool radv_get_memory_fd(struct radv_device *device, struct radv_device_memory *memory, int *pFD);
void radv_free_memory(struct radv_device *device, const VkAllocationCallbacks *pAllocator,
struct radv_device_memory *mem);

2
src/amd/vulkan/radv_radeon_winsys.h
View file

@ -311,6 +311,8 @@ struct radeon_winsys {
void (*cs_dump)(struct radeon_cmdbuf *cs, FILE *file, const int *trace_ids, int trace_id_count,
enum radv_cs_dump_type type);
void (*cs_annotate)(struct radeon_cmdbuf *cs, const char *marker);
void (*dump_bo_ranges)(struct radeon_winsys *ws, FILE *file);
void (*dump_bo_log)(struct radeon_winsys *ws, FILE *file);

43
src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
View file

@ -100,6 +100,8 @@ struct radv_amdgpu_cs {
unsigned max_num_virtual_buffers;
struct radeon_winsys_bo **virtual_buffers;
int *virtual_buffer_hash_table;
struct hash_table *annotations;
};
struct radv_winsys_sem_counts {
@ -195,11 +197,19 @@ radv_amdgpu_cs_ib_to_info(struct radv_amdgpu_cs *cs, struct radv_amdgpu_ib ib)
return info;
}
static void
radv_amdgpu_cs_free_annotation(struct hash_entry *entry)
{
free(entry->data);
}
static void
radv_amdgpu_cs_destroy(struct radeon_cmdbuf *rcs)
{
struct radv_amdgpu_cs *cs = radv_amdgpu_cs(rcs);
_mesa_hash_table_destroy(cs->annotations, radv_amdgpu_cs_free_annotation);
if (cs->ib_buffer)
cs->ws->base.buffer_destroy(&cs->ws->base, cs->ib_buffer);
@ -529,6 +539,9 @@ radv_amdgpu_cs_reset(struct radeon_cmdbuf *_cs)
if (cs->use_ib)
cs->ib_size_ptr = &cs->ib.size;
_mesa_hash_table_destroy(cs->annotations, radv_amdgpu_cs_free_annotation);
cs->annotations = NULL;
}
static void
@ -1418,12 +1431,13 @@ radv_amdgpu_winsys_cs_dump(struct radeon_cmdbuf *_cs, FILE *file, const int *tra
.ip_type = cs->hw_ip,
.addr_callback = radv_amdgpu_winsys_get_cpu_addr,
.addr_callback_data = cs,
.annotations = cs->annotations,
};
ac_parse_ib(&ib_parser, "main IB");
} else {
uint32_t *ib_dw = addr_info.cpu_addr;
ac_gather_context_rolls(file, &ib_dw, &cs->ib_buffers[0].cdw, 1, NULL, &ws->info);
ac_gather_context_rolls(file, &ib_dw, &cs->ib_buffers[0].cdw, 1, cs->annotations, &ws->info);
}
} else {
uint32_t **ibs = type == RADV_CS_DUMP_TYPE_CTX_ROLLS ? malloc(cs->num_ib_buffers * sizeof(uint32_t *)) : NULL;
@ -1457,6 +1471,7 @@ radv_amdgpu_winsys_cs_dump(struct radeon_cmdbuf *_cs, FILE *file, const int *tra
.ip_type = cs->hw_ip,
.addr_callback = radv_amdgpu_winsys_get_cpu_addr,
.addr_callback_data = cs,
.annotations = cs->annotations,
};
ac_parse_ib(&ib_parser, name);
@ -1467,7 +1482,7 @@ radv_amdgpu_winsys_cs_dump(struct radeon_cmdbuf *_cs, FILE *file, const int *tra
}
if (type == RADV_CS_DUMP_TYPE_CTX_ROLLS) {
ac_gather_context_rolls(file, ibs, ib_dw_sizes, cs->num_ib_buffers, NULL, &ws->info);
ac_gather_context_rolls(file, ibs, ib_dw_sizes, cs->num_ib_buffers, cs->annotations, &ws->info);
free(ibs);
free(ib_dw_sizes);
@ -1475,6 +1490,29 @@ radv_amdgpu_winsys_cs_dump(struct radeon_cmdbuf *_cs, FILE *file, const int *tra
}
}
static void
radv_amdgpu_winsys_cs_annotate(struct radeon_cmdbuf *_cs, const char *annotation)
{
struct radv_amdgpu_cs *cs = (struct radv_amdgpu_cs *)_cs;
if (!cs->annotations) {
cs->annotations = _mesa_pointer_hash_table_create(NULL);
if (!cs->annotations)
return;
}
struct hash_entry *entry = _mesa_hash_table_search(cs->annotations, _cs->buf + _cs->cdw);
if (entry) {
char *old_annotation = entry->data;
char *new_annotation = calloc(strlen(old_annotation) + strlen(annotation) + 5, 1);
sprintf(new_annotation, "%s -> %s", old_annotation, annotation);
free(old_annotation);
_mesa_hash_table_insert(cs->annotations, _cs->buf + _cs->cdw, new_annotation);
} else {
_mesa_hash_table_insert(cs->annotations, _cs->buf + _cs->cdw, strdup(annotation));
}
}
static uint32_t
radv_to_amdgpu_priority(enum radeon_ctx_priority radv_priority)
{
@ -1879,4 +1917,5 @@ radv_amdgpu_cs_init_functions(struct radv_amdgpu_winsys *ws)
ws->base.cs_execute_ib = radv_amdgpu_cs_execute_ib;
ws->base.cs_submit = radv_amdgpu_winsys_cs_submit;
ws->base.cs_dump = radv_amdgpu_winsys_cs_dump;
ws->base.cs_annotate = radv_amdgpu_winsys_cs_annotate;
}