mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-05 11:48:06 +02:00
i965: Implement a disassembler for Broadwell's new instruction encoding.
Heavily based on Keith Packard's existing brw_disasm.c code. I've tried
to go through most of the pieces (like SFIDs) and update the lists to
include features added in recent generations.
v2: Port to use the C-based instruction emitters. This allows us to use
C99 array initializers, which tidies up some of the code.
v3: Improve decoding of render target write messages.
v4: Update for BRW_REGISTER_TYPE becoming an abstraction.
v5: Rebase on Chris Forbes' SFID message defines.
v6: Fix disassembly of UV immediates; remove silly casts.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Kenneth Graunke
parent
0923dad90a
commit
8ea4b16eea
2 changed files with 932 additions and 0 deletions
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@ -139,5 +139,6 @@ i965_FILES = \
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gen7_vs_state.c \
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gen7_wm_state.c \
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gen7_wm_surface_state.c \
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gen8_disasm.c \
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gen8_instruction.c \
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$()
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931
src/mesa/drivers/dri/i965/gen8_disasm.c
Normal file
931
src/mesa/drivers/dri/i965/gen8_disasm.c
Normal file
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@ -0,0 +1,931 @@
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/*
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* Copyright © 2008 Keith Packard
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* Copyright © 2009-2013 Intel Corporation
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*
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* Permission to use, copy, modify, distribute, and sell this software and its
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* documentation for any purpose is hereby granted without fee, provided that
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* the above copyright notice appear in all copies and that both that copyright
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* notice and this permission notice appear in supporting documentation, and
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* that the name of the copyright holders not be used in advertising or
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* publicity pertaining to distribution of the software without specific,
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* written prior permission. The copyright holders make no representations
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* about the suitability of this software for any purpose. It is provided "as
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* is" without express or implied warranty.
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*
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* THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
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* EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
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* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
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* OF THIS SOFTWARE.
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <getopt.h>
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#include <unistd.h>
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#include <stdarg.h>
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#include "brw_context.h"
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#include "brw_defines.h"
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#include "gen8_instruction.h"
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static const struct opcode_desc *m_opcode = opcode_descs;
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static const char *const m_conditional_modifier[16] = {
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[BRW_CONDITIONAL_NONE] = "",
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[BRW_CONDITIONAL_Z] = ".e",
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[BRW_CONDITIONAL_NZ] = ".ne",
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[BRW_CONDITIONAL_G] = ".g",
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[BRW_CONDITIONAL_GE] = ".ge",
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[BRW_CONDITIONAL_L] = ".l",
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[BRW_CONDITIONAL_LE] = ".le",
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[BRW_CONDITIONAL_O] = ".o",
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[BRW_CONDITIONAL_U] = ".u",
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};
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static const char *const m_negate[2] = { "", "-" };
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static const char *const m_abs[2] = { "", "(abs)" };
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static const char *const m_vert_stride[16] = {
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"0",
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"1",
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"2",
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"4",
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"8",
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"16",
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"32",
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};
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static const char *const width[8] = {
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"1",
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"2",
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"4",
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"8",
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"16",
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};
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static const char *const m_horiz_stride[4] = {
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"0",
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"1",
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"2",
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"4"
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};
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static const char *const m_chan_sel[4] = { "x", "y", "z", "w" };
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static const char *const m_debug_ctrl[2] = { "", ".breakpoint" };
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static const char *const m_saturate[2] = { "", ".sat" };
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static const char *const m_accwr[2] = { "", "AccWrEnable" };
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static const char *const m_maskctrl[2] = { "WE_normal", "WE_all" };
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static const char *const m_exec_size[8] = {
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"1",
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"2",
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"4",
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"8",
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"16",
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"32",
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};
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static const char *const m_pred_inv[2] = { "+", "-" };
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static const char *const m_pred_ctrl_align16[16] = {
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"",
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"",
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".x",
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".y",
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".z",
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".w",
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".any4h",
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".all4h",
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};
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static const char *const m_pred_ctrl_align1[16] = {
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"",
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"",
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".anyv",
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".allv",
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".any2h",
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".all2h",
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".any4h",
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".all4h",
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".any8h",
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".all8h",
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".any16h",
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".all16h",
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".any32h",
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".all32h",
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};
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static const char *const m_thread_ctrl[4] = {
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"",
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"atomic",
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"switch",
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};
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static const char *const m_dep_clear[4] = {
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"",
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"NoDDClr",
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};
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static const char *const m_dep_check[4] = {
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"",
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"NoDDChk",
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};
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static const char *const m_mask_ctrl[4] = {
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"",
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"nomask",
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};
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static const char *const m_access_mode[2] = { "align1", "align16" };
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static const char *const m_reg_encoding[] = {
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[BRW_HW_REG_TYPE_UD] = "UD",
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[BRW_HW_REG_TYPE_D] = "D",
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[BRW_HW_REG_TYPE_UW] = "UW",
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[BRW_HW_REG_TYPE_W] = "W",
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[BRW_HW_REG_NON_IMM_TYPE_UB] = "UB",
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[BRW_HW_REG_NON_IMM_TYPE_B] = "B",
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[GEN7_HW_REG_NON_IMM_TYPE_DF] = "DF",
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[BRW_HW_REG_TYPE_F] = "F",
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[GEN8_HW_REG_TYPE_UQ] = "UQ",
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[GEN8_HW_REG_TYPE_Q] = "Q",
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[GEN8_HW_REG_NON_IMM_TYPE_HF] = "HF",
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};
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static const char *const m_three_source_reg_encoding[] = {
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[BRW_3SRC_TYPE_F] = "F",
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[BRW_3SRC_TYPE_D] = "D",
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[BRW_3SRC_TYPE_UD] = "UD",
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};
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static const int reg_type_size[] = {
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[BRW_HW_REG_TYPE_UD] = 4,
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[BRW_HW_REG_TYPE_D] = 4,
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[BRW_HW_REG_TYPE_UW] = 2,
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[BRW_HW_REG_TYPE_W] = 2,
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[BRW_HW_REG_NON_IMM_TYPE_UB] = 1,
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[BRW_HW_REG_NON_IMM_TYPE_B] = 1,
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[GEN7_HW_REG_NON_IMM_TYPE_DF] = 8,
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[BRW_HW_REG_TYPE_F] = 4,
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};
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static const char *const m_reg_file[4] = {
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[BRW_ARCHITECTURE_REGISTER_FILE] = "A",
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[BRW_GENERAL_REGISTER_FILE] = "g",
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[BRW_IMMEDIATE_VALUE] = "imm",
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};
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static const char *const m_writemask[16] = {
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".(none)",
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".x",
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".y",
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".xy",
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".z",
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".xz",
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".yz",
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".xyz",
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".w",
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".xw",
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".yw",
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".xyw",
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".zw",
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".xzw",
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".yzw",
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"",
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};
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static const char *const m_eot[2] = { "", "EOT" };
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static const char *const m_sfid[16] = {
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[BRW_SFID_NULL] = "null",
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[BRW_SFID_SAMPLER] = "sampler",
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[BRW_SFID_MESSAGE_GATEWAY] = "gateway",
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[GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "dp/sampler_cache",
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[GEN6_SFID_DATAPORT_RENDER_CACHE] = "dp/render_cache",
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[BRW_SFID_URB] = "URB",
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[BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
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[BRW_SFID_VME] = "vme",
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[GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "dp/constant_cache",
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[GEN7_SFID_DATAPORT_DATA_CACHE] = "dp/data_cache",
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[GEN7_SFID_PIXEL_INTERPOLATOR] = "pi",
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[HSW_SFID_DATAPORT_DATA_CACHE_1] = "dp/data_cache:1",
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[HSW_SFID_CRE] = "cre",
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};
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static const char *const m_math_function[16] = {
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[BRW_MATH_FUNCTION_INV] = "inv",
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[BRW_MATH_FUNCTION_LOG] = "log",
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[BRW_MATH_FUNCTION_EXP] = "exp",
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[BRW_MATH_FUNCTION_SQRT] = "sqrt",
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[BRW_MATH_FUNCTION_RSQ] = "rsq",
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[BRW_MATH_FUNCTION_SIN] = "sin",
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[BRW_MATH_FUNCTION_COS] = "cos",
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[BRW_MATH_FUNCTION_FDIV] = "fdiv",
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[BRW_MATH_FUNCTION_POW] = "pow",
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[BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod",
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[BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv",
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[BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod",
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[GEN8_MATH_FUNCTION_INVM] = "invm",
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[GEN8_MATH_FUNCTION_RSQRTM] = "rsqrtm",
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};
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static const char *const m_urb_opcode[16] = {
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[0] = "write HWord",
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[1] = "write OWord",
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[2] = "read HWord",
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[3] = "read OWord",
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[4] = "atomic mov",
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[5] = "atomic inc",
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[6] = "atomic add",
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[7] = "SIMD8 write",
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[8] = "SIMD8 read",
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/* [9-15] - reserved */
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};
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static const char *const m_urb_interleave[2] = { "", "interleaved" };
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static const char *const m_rt_opcode[] = {
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[0] = "SIMD16",
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[1] = "RepData",
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[2] = "DualLow",
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[3] = "DualHigh",
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[4] = "SIMD8",
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[5] = "ImageWrite",
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[6] = "Reserved",
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[7] = "RepData(7)",
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};
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static int column;
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static int
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string(FILE *file, const char *string)
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{
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fputs(string, file);
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column += strlen(string);
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return 0;
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}
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static int
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format(FILE *f, const char *format, ...)
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{
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char buf[1024];
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va_list args;
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va_start(args, format);
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vsnprintf(buf, sizeof(buf) - 1, format, args);
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va_end(args);
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string(f, buf);
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return 0;
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}
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static int
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newline(FILE *f)
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{
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putc('\n', f);
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column = 0;
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return 0;
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}
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static int
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pad(FILE *f, int c)
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{
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do
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string(f, " ");
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while (column < c);
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return 0;
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}
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static int
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control(FILE *file, const char *name, const char *const ctrl[],
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unsigned id, int *space)
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{
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if (!ctrl[id]) {
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fprintf(file, "*** invalid %s value %d ", name, id);
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return 1;
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}
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if (ctrl[id][0]) {
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if (space && *space)
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string(file, " ");
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string(file, ctrl[id]);
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if (space)
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*space = 1;
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}
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return 0;
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}
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static int
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print_opcode(FILE *file, int id)
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{
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if (!m_opcode[id].name) {
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format(file, "*** invalid opcode value %d ", id);
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return 1;
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}
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string(file, m_opcode[id].name);
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return 0;
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}
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static int
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reg(FILE *file, unsigned reg_file, unsigned _reg_nr)
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{
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int err = 0;
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if (reg_file == BRW_ARCHITECTURE_REGISTER_FILE) {
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switch (_reg_nr & 0xf0) {
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case BRW_ARF_NULL:
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string(file, "null");
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return -1;
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case BRW_ARF_ADDRESS:
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format(file, "a%d", _reg_nr & 0x0f);
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break;
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case BRW_ARF_ACCUMULATOR:
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format(file, "acc%d", _reg_nr & 0x0f);
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break;
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case BRW_ARF_FLAG:
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format(file, "f%d", _reg_nr & 0x0f);
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break;
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case BRW_ARF_MASK:
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format(file, "mask%d", _reg_nr & 0x0f);
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break;
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case BRW_ARF_MASK_STACK:
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format(file, "msd%d", _reg_nr & 0x0f);
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break;
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case BRW_ARF_STATE:
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format(file, "sr%d", _reg_nr & 0x0f);
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break;
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case BRW_ARF_CONTROL:
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format(file, "cr%d", _reg_nr & 0x0f);
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break;
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case BRW_ARF_NOTIFICATION_COUNT:
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format(file, "n%d", _reg_nr & 0x0f);
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break;
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case BRW_ARF_IP:
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string(file, "ip");
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return -1;
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break;
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default:
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format(file, "ARF%d", _reg_nr);
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break;
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}
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} else {
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err |= control(file, "src reg file", m_reg_file, reg_file, NULL);
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format(file, "%d", _reg_nr);
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}
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return err;
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}
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static int
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dest(FILE *file, struct gen8_instruction *inst)
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{
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int err = 0;
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if (gen8_access_mode(inst) == BRW_ALIGN_1) {
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assert(gen8_dst_address_mode(inst) == BRW_ADDRESS_DIRECT);
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err |= reg(file, gen8_dst_reg_file(inst), gen8_dst_da_reg_nr(inst));
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if (err == -1)
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return 0;
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if (gen8_dst_da1_subreg_nr(inst))
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format(file, ".%d", gen8_dst_da1_subreg_nr(inst) /
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reg_type_size[gen8_dst_reg_type(inst)]);
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string(file, "<");
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err |= control(file, "horiz stride", m_horiz_stride, gen8_dst_da1_hstride(inst), NULL);
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string(file, ">");
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err |= control(file, "dest reg encoding", m_reg_encoding, gen8_dst_reg_type(inst), NULL);
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} else {
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assert(gen8_dst_address_mode(inst) == BRW_ADDRESS_DIRECT);
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err |= reg(file, gen8_dst_reg_file(inst), gen8_dst_da_reg_nr(inst));
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if (err == -1)
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return 0;
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if (gen8_dst_da16_subreg_nr(inst))
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format(file, ".%d", gen8_dst_da16_subreg_nr(inst) /
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reg_type_size[gen8_dst_reg_type(inst)]);
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string(file, "<1>");
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err |= control(file, "writemask", m_writemask, gen8_da16_writemask(inst), NULL);
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err |= control(file, "dest reg encoding", m_reg_encoding, gen8_dst_reg_type(inst), NULL);
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}
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return 0;
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}
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static int
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dest_3src(FILE *file, struct gen8_instruction *inst)
|
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{
|
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int err = 0;
|
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|
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err |= reg(file, BRW_GENERAL_REGISTER_FILE, gen8_dst_3src_reg_nr(inst));
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if (err == -1)
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return 0;
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if (gen8_dst_3src_subreg_nr(inst))
|
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format(file, ".%d", gen8_dst_3src_subreg_nr(inst));
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string(file, "<1>");
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err |= control(file, "writemask", m_writemask, gen8_dst_3src_writemask(inst),
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NULL);
|
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err |= control(file, "dest reg encoding", m_three_source_reg_encoding,
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gen8_dst_3src_type(inst), NULL);
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||||
|
||||
return 0;
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||||
}
|
||||
|
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static int
|
||||
src_align1_region(FILE *file, unsigned vert_stride, unsigned _width,
|
||||
unsigned horiz_stride)
|
||||
{
|
||||
int err = 0;
|
||||
string(file, "<");
|
||||
err |= control(file, "vert stride", m_vert_stride, vert_stride, NULL);
|
||||
string(file, ",");
|
||||
err |= control(file, "width", width, _width, NULL);
|
||||
string(file, ",");
|
||||
err |= control(file, "horiz_stride", m_horiz_stride, horiz_stride, NULL);
|
||||
string(file, ">");
|
||||
return err;
|
||||
}
|
||||
|
||||
static int
|
||||
src_swizzle(FILE *file, unsigned x, unsigned y, unsigned z, unsigned w)
|
||||
{
|
||||
int err = 0;
|
||||
|
||||
/* Three kinds of swizzle display:
|
||||
* - identity - nothing printed
|
||||
* - 1->all - print the single channel
|
||||
* - 1->1 - print the mapping
|
||||
*/
|
||||
if (x == BRW_CHANNEL_X &&
|
||||
y == BRW_CHANNEL_Y &&
|
||||
z == BRW_CHANNEL_Z &&
|
||||
w == BRW_CHANNEL_W) {
|
||||
; /* Print nothing */
|
||||
} else if (x == y && x == z && x == w) {
|
||||
string(file, ".");
|
||||
err |= control(file, "channel select", m_chan_sel, x, NULL);
|
||||
} else {
|
||||
string(file, ".");
|
||||
err |= control(file, "channel select", m_chan_sel, x, NULL);
|
||||
err |= control(file, "channel select", m_chan_sel, y, NULL);
|
||||
err |= control(file, "channel select", m_chan_sel, z, NULL);
|
||||
err |= control(file, "channel select", m_chan_sel, w, NULL);
|
||||
}
|
||||
return err;
|
||||
}
|
||||
|
||||
static int
|
||||
src_da1(FILE *file, unsigned type, unsigned reg_file,
|
||||
unsigned vert_stride, unsigned _width, unsigned horiz_stride,
|
||||
unsigned reg_num, unsigned sub_reg_num, unsigned _abs, unsigned negate)
|
||||
{
|
||||
int err = 0;
|
||||
err |= control(file, "negate", m_negate, negate, NULL);
|
||||
err |= control(file, "abs", m_abs, _abs, NULL);
|
||||
|
||||
err |= reg(file, reg_file, reg_num);
|
||||
if (err == -1)
|
||||
return 0;
|
||||
if (sub_reg_num)
|
||||
format(file, ".%d", sub_reg_num / reg_type_size[type]); /* use formal style like spec */
|
||||
src_align1_region(file, vert_stride, _width, horiz_stride);
|
||||
err |= control(file, "src reg encoding", m_reg_encoding, type, NULL);
|
||||
return err;
|
||||
}
|
||||
|
||||
static int
|
||||
src_da16(FILE *file,
|
||||
unsigned _reg_type,
|
||||
unsigned reg_file,
|
||||
unsigned vert_stride,
|
||||
unsigned _reg_nr,
|
||||
unsigned _subreg_nr,
|
||||
unsigned _abs,
|
||||
unsigned negate,
|
||||
unsigned swz_x,
|
||||
unsigned swz_y,
|
||||
unsigned swz_z,
|
||||
unsigned swz_w)
|
||||
{
|
||||
int err = 0;
|
||||
err |= control(file, "negate", m_negate, negate, NULL);
|
||||
err |= control(file, "abs", m_abs, _abs, NULL);
|
||||
|
||||
err |= reg(file, reg_file, _reg_nr);
|
||||
if (err == -1)
|
||||
return 0;
|
||||
if (_subreg_nr)
|
||||
/* bit4 for subreg number byte addressing. Make this same meaning as
|
||||
* in da1 case, so output looks consistent.
|
||||
*/
|
||||
format(file, ".%d", 16 / reg_type_size[_reg_type]);
|
||||
string(file, "<");
|
||||
err |= control(file, "vert stride", m_vert_stride, vert_stride, NULL);
|
||||
string(file, ",4,1>");
|
||||
/*
|
||||
* Three kinds of swizzle display:
|
||||
* identity - nothing printed
|
||||
* 1->all - print the single channel
|
||||
* 1->1 - print the mapping
|
||||
*/
|
||||
if (swz_x == BRW_CHANNEL_X &&
|
||||
swz_y == BRW_CHANNEL_Y &&
|
||||
swz_z == BRW_CHANNEL_Z &&
|
||||
swz_w == BRW_CHANNEL_W) {
|
||||
; /* Print nothing */
|
||||
} else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w) {
|
||||
string(file, ".");
|
||||
err |= control(file, "channel select", m_chan_sel, swz_x, NULL);
|
||||
} else {
|
||||
string(file, ".");
|
||||
err |= control(file, "channel select", m_chan_sel, swz_x, NULL);
|
||||
err |= control(file, "channel select", m_chan_sel, swz_y, NULL);
|
||||
err |= control(file, "channel select", m_chan_sel, swz_z, NULL);
|
||||
err |= control(file, "channel select", m_chan_sel, swz_w, NULL);
|
||||
}
|
||||
err |= control(file, "src da16 reg type", m_reg_encoding, _reg_type, NULL);
|
||||
return err;
|
||||
}
|
||||
|
||||
static int
|
||||
src0_3src(FILE *file, struct gen8_instruction *inst)
|
||||
{
|
||||
int err = 0;
|
||||
unsigned swiz = gen8_src0_3src_swizzle(inst);
|
||||
unsigned swz_x = (swiz >> 0) & 0x3;
|
||||
unsigned swz_y = (swiz >> 2) & 0x3;
|
||||
unsigned swz_z = (swiz >> 4) & 0x3;
|
||||
unsigned swz_w = (swiz >> 6) & 0x3;
|
||||
|
||||
err |= control(file, "negate", m_negate, gen8_src0_3src_negate(inst), NULL);
|
||||
err |= control(file, "abs", m_abs, gen8_src0_3src_abs(inst), NULL);
|
||||
|
||||
err |= reg(file, BRW_GENERAL_REGISTER_FILE, gen8_src0_3src_reg_nr(inst));
|
||||
if (err == -1)
|
||||
return 0;
|
||||
if (gen8_src0_3src_subreg_nr(inst))
|
||||
format(file, ".%d", gen8_src0_3src_subreg_nr(inst));
|
||||
string(file, "<4,1,1>");
|
||||
err |= control(file, "src da16 reg type", m_three_source_reg_encoding,
|
||||
gen8_src_3src_type(inst), NULL);
|
||||
err |= src_swizzle(file, swz_x, swz_y, swz_z, swz_w);
|
||||
return err;
|
||||
}
|
||||
|
||||
static int
|
||||
src1_3src(FILE *file, struct gen8_instruction *inst)
|
||||
{
|
||||
int err = 0;
|
||||
unsigned swiz = gen8_src1_3src_swizzle(inst);
|
||||
unsigned swz_x = (swiz >> 0) & 0x3;
|
||||
unsigned swz_y = (swiz >> 2) & 0x3;
|
||||
unsigned swz_z = (swiz >> 4) & 0x3;
|
||||
unsigned swz_w = (swiz >> 6) & 0x3;
|
||||
unsigned src1_subreg_nr = gen8_src1_3src_subreg_nr(inst);
|
||||
|
||||
err |= control(file, "negate", m_negate, gen8_src1_3src_negate(inst), NULL);
|
||||
err |= control(file, "abs", m_abs, gen8_src1_3src_abs(inst), NULL);
|
||||
|
||||
err |= reg(file, BRW_GENERAL_REGISTER_FILE, gen8_src1_3src_reg_nr(inst));
|
||||
if (err == -1)
|
||||
return 0;
|
||||
if (src1_subreg_nr)
|
||||
format(file, ".%d", src1_subreg_nr);
|
||||
string(file, "<4,1,1>");
|
||||
err |= control(file, "src da16 reg type", m_three_source_reg_encoding,
|
||||
gen8_src_3src_type(inst), NULL);
|
||||
err |= src_swizzle(file, swz_x, swz_y, swz_z, swz_w);
|
||||
return err;
|
||||
}
|
||||
|
||||
static int
|
||||
src2_3src(FILE *file, struct gen8_instruction *inst)
|
||||
{
|
||||
int err = 0;
|
||||
unsigned swiz = gen8_src2_3src_swizzle(inst);
|
||||
unsigned swz_x = (swiz >> 0) & 0x3;
|
||||
unsigned swz_y = (swiz >> 2) & 0x3;
|
||||
unsigned swz_z = (swiz >> 4) & 0x3;
|
||||
unsigned swz_w = (swiz >> 6) & 0x3;
|
||||
|
||||
err |= control(file, "negate", m_negate, gen8_src2_3src_negate(inst), NULL);
|
||||
err |= control(file, "abs", m_abs, gen8_src2_3src_abs(inst), NULL);
|
||||
|
||||
err |= reg(file, BRW_GENERAL_REGISTER_FILE, gen8_src2_3src_reg_nr(inst));
|
||||
if (err == -1)
|
||||
return 0;
|
||||
if (gen8_src2_3src_subreg_nr(inst))
|
||||
format(file, ".%d", gen8_src2_3src_subreg_nr(inst));
|
||||
string(file, "<4,1,1>");
|
||||
err |= control(file, "src da16 reg type", m_three_source_reg_encoding,
|
||||
gen8_src_3src_type(inst), NULL);
|
||||
err |= src_swizzle(file, swz_x, swz_y, swz_z, swz_w);
|
||||
return err;
|
||||
}
|
||||
|
||||
static int
|
||||
imm(FILE *file, unsigned type, struct gen8_instruction *inst)
|
||||
{
|
||||
switch (type) {
|
||||
case BRW_HW_REG_TYPE_UD:
|
||||
format(file, "0x%08xUD", gen8_src1_imm_ud(inst));
|
||||
break;
|
||||
case BRW_HW_REG_TYPE_D:
|
||||
format(file, "%dD", gen8_src1_imm_d(inst));
|
||||
break;
|
||||
case BRW_HW_REG_TYPE_UW:
|
||||
format(file, "0x%04xUW", (uint16_t) gen8_src1_imm_ud(inst));
|
||||
break;
|
||||
case BRW_HW_REG_TYPE_W:
|
||||
format(file, "%dW", (int16_t) gen8_src1_imm_d(inst));
|
||||
break;
|
||||
case BRW_HW_REG_IMM_TYPE_UV:
|
||||
format(file, "0x%08xUV", gen8_src1_imm_ud(inst));
|
||||
break;
|
||||
case BRW_HW_REG_IMM_TYPE_VF:
|
||||
format(file, "Vector Float");
|
||||
break;
|
||||
case BRW_HW_REG_IMM_TYPE_V:
|
||||
format(file, "0x%08xV", gen8_src1_imm_ud(inst));
|
||||
break;
|
||||
case BRW_HW_REG_TYPE_F:
|
||||
format(file, "%-gF", gen8_src1_imm_f(inst));
|
||||
break;
|
||||
case GEN8_HW_REG_IMM_TYPE_DF:
|
||||
case GEN8_HW_REG_IMM_TYPE_HF:
|
||||
assert(!"Not implemented yet");
|
||||
break;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
src0(FILE *file, struct gen8_instruction *inst)
|
||||
{
|
||||
if (gen8_src0_reg_file(inst) == BRW_IMMEDIATE_VALUE)
|
||||
return imm(file, gen8_src0_reg_type(inst), inst);
|
||||
|
||||
if (gen8_access_mode(inst) == BRW_ALIGN_1) {
|
||||
assert(gen8_src0_address_mode(inst) == BRW_ADDRESS_DIRECT);
|
||||
return src_da1(file,
|
||||
gen8_src0_reg_type(inst),
|
||||
gen8_src0_reg_file(inst),
|
||||
gen8_src0_vert_stride(inst),
|
||||
gen8_src0_da1_width(inst),
|
||||
gen8_src0_da1_hstride(inst),
|
||||
gen8_src0_da_reg_nr(inst),
|
||||
gen8_src0_da1_subreg_nr(inst),
|
||||
gen8_src0_abs(inst),
|
||||
gen8_src0_negate(inst));
|
||||
} else {
|
||||
assert(gen8_src0_address_mode(inst) == BRW_ADDRESS_DIRECT);
|
||||
return src_da16(file,
|
||||
gen8_src0_reg_type(inst),
|
||||
gen8_src0_reg_file(inst),
|
||||
gen8_src0_vert_stride(inst),
|
||||
gen8_src0_da_reg_nr(inst),
|
||||
gen8_src0_da16_subreg_nr(inst),
|
||||
gen8_src0_abs(inst),
|
||||
gen8_src0_negate(inst),
|
||||
gen8_src0_da16_swiz_x(inst),
|
||||
gen8_src0_da16_swiz_y(inst),
|
||||
gen8_src0_da16_swiz_z(inst),
|
||||
gen8_src0_da16_swiz_w(inst));
|
||||
}
|
||||
}
|
||||
|
||||
static int
|
||||
src1(FILE *file, struct gen8_instruction *inst)
|
||||
{
|
||||
if (gen8_src1_reg_file(inst) == BRW_IMMEDIATE_VALUE)
|
||||
return imm(file, gen8_src1_reg_type(inst), inst);
|
||||
|
||||
if (gen8_access_mode(inst) == BRW_ALIGN_1) {
|
||||
assert(gen8_src1_address_mode(inst) == BRW_ADDRESS_DIRECT);
|
||||
return src_da1(file,
|
||||
gen8_src1_reg_type(inst),
|
||||
gen8_src1_reg_file(inst),
|
||||
gen8_src1_vert_stride(inst),
|
||||
gen8_src1_da1_width(inst),
|
||||
gen8_src1_da1_hstride(inst),
|
||||
gen8_src1_da_reg_nr(inst),
|
||||
gen8_src1_da1_subreg_nr(inst),
|
||||
gen8_src1_abs(inst),
|
||||
gen8_src1_negate(inst));
|
||||
} else {
|
||||
assert(gen8_src1_address_mode(inst) == BRW_ADDRESS_DIRECT);
|
||||
return src_da16(file,
|
||||
gen8_src1_reg_type(inst),
|
||||
gen8_src1_reg_file(inst),
|
||||
gen8_src1_vert_stride(inst),
|
||||
gen8_src1_da_reg_nr(inst),
|
||||
gen8_src1_da16_subreg_nr(inst),
|
||||
gen8_src1_abs(inst),
|
||||
gen8_src1_negate(inst),
|
||||
gen8_src1_da16_swiz_x(inst),
|
||||
gen8_src1_da16_swiz_y(inst),
|
||||
gen8_src1_da16_swiz_z(inst),
|
||||
gen8_src1_da16_swiz_w(inst));
|
||||
}
|
||||
}
|
||||
|
||||
static int esize[6] = { 1, 2, 4, 8, 16, 32 };
|
||||
|
||||
static int
|
||||
qtr_ctrl(FILE *file, struct gen8_instruction *inst)
|
||||
{
|
||||
int qtr_ctl = gen8_qtr_control(inst);
|
||||
int exec_size = esize[gen8_exec_size(inst)];
|
||||
|
||||
if (exec_size == 8) {
|
||||
switch (qtr_ctl) {
|
||||
case 0:
|
||||
string(file, " 1Q");
|
||||
break;
|
||||
case 1:
|
||||
string(file, " 2Q");
|
||||
break;
|
||||
case 2:
|
||||
string(file, " 3Q");
|
||||
break;
|
||||
case 3:
|
||||
string(file, " 4Q");
|
||||
break;
|
||||
}
|
||||
} else if (exec_size == 16) {
|
||||
if (qtr_ctl < 2)
|
||||
string(file, " 1H");
|
||||
else
|
||||
string(file, " 2H");
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
gen8_disassemble(FILE *file, struct gen8_instruction *inst, int gen)
|
||||
{
|
||||
int err = 0;
|
||||
int space = 0;
|
||||
|
||||
const int opcode = gen8_opcode(inst);
|
||||
|
||||
if (gen8_pred_control(inst)) {
|
||||
string(file, "(");
|
||||
err |= control(file, "predicate inverse", m_pred_inv, gen8_pred_inv(inst), NULL);
|
||||
format(file, "f%d", gen8_flag_reg_nr(inst));
|
||||
if (gen8_flag_subreg_nr(inst))
|
||||
format(file, ".%d", gen8_flag_subreg_nr(inst));
|
||||
if (gen8_access_mode(inst) == BRW_ALIGN_1) {
|
||||
err |= control(file, "predicate control align1", m_pred_ctrl_align1,
|
||||
gen8_pred_control(inst), NULL);
|
||||
} else {
|
||||
err |= control(file, "predicate control align16", m_pred_ctrl_align16,
|
||||
gen8_pred_control(inst), NULL);
|
||||
}
|
||||
string(file, ") ");
|
||||
}
|
||||
|
||||
err |= print_opcode(file, opcode);
|
||||
err |= control(file, "saturate", m_saturate, gen8_saturate(inst), NULL);
|
||||
err |= control(file, "debug control", m_debug_ctrl, gen8_debug_control(inst), NULL);
|
||||
|
||||
if (opcode == BRW_OPCODE_MATH) {
|
||||
string(file, " ");
|
||||
err |= control(file, "function", m_math_function, gen8_math_function(inst),
|
||||
NULL);
|
||||
} else if (opcode != BRW_OPCODE_SEND && opcode != BRW_OPCODE_SENDC) {
|
||||
err |= control(file, "conditional modifier", m_conditional_modifier,
|
||||
gen8_cond_modifier(inst), NULL);
|
||||
|
||||
/* If we're using the conditional modifier, print the flag reg used. */
|
||||
if (gen8_cond_modifier(inst) && opcode != BRW_OPCODE_SEL) {
|
||||
format(file, ".f%d", gen8_flag_reg_nr(inst));
|
||||
if (gen8_flag_subreg_nr(inst))
|
||||
format(file, ".%d", gen8_flag_subreg_nr(inst));
|
||||
}
|
||||
}
|
||||
|
||||
if (opcode != BRW_OPCODE_NOP) {
|
||||
string(file, "(");
|
||||
err |= control(file, "execution size", m_exec_size, gen8_exec_size(inst), NULL);
|
||||
string(file, ")");
|
||||
}
|
||||
|
||||
if (m_opcode[opcode].nsrc == 3) {
|
||||
pad(file, 16);
|
||||
err |= dest_3src(file, inst);
|
||||
|
||||
pad(file, 32);
|
||||
err |= src0_3src(file, inst);
|
||||
|
||||
pad(file, 48);
|
||||
err |= src1_3src(file, inst);
|
||||
|
||||
pad(file, 64);
|
||||
err |= src2_3src(file, inst);
|
||||
} else {
|
||||
if (m_opcode[opcode].ndst > 0) {
|
||||
pad(file, 16);
|
||||
err |= dest(file, inst);
|
||||
} else if (opcode == BRW_OPCODE_ENDIF) {
|
||||
format(file, " %d", gen8_jip(inst));
|
||||
} else if (opcode == BRW_OPCODE_IF ||
|
||||
opcode == BRW_OPCODE_ELSE ||
|
||||
opcode == BRW_OPCODE_WHILE ||
|
||||
opcode == BRW_OPCODE_BREAK ||
|
||||
opcode == BRW_OPCODE_CONTINUE ||
|
||||
opcode == BRW_OPCODE_HALT) {
|
||||
format(file, " %d %d", gen8_jip(inst), gen8_uip(inst));
|
||||
}
|
||||
|
||||
if (m_opcode[opcode].nsrc > 0) {
|
||||
pad(file, 32);
|
||||
err |= src0(file, inst);
|
||||
}
|
||||
if (m_opcode[opcode].nsrc > 1) {
|
||||
pad(file, 48);
|
||||
err |= src1(file, inst);
|
||||
}
|
||||
}
|
||||
|
||||
if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) {
|
||||
const int sfid = gen8_sfid(inst);
|
||||
|
||||
newline(file);
|
||||
pad(file, 16);
|
||||
space = 0;
|
||||
|
||||
err |= control(file, "SFID", m_sfid, sfid, &space);
|
||||
|
||||
switch (sfid) {
|
||||
case BRW_SFID_SAMPLER:
|
||||
format(file, " (%d, %d, %d, %d)",
|
||||
gen8_binding_table_index(inst),
|
||||
gen8_sampler(inst),
|
||||
gen8_sampler_msg_type(inst),
|
||||
gen8_sampler_simd_mode(inst));
|
||||
break;
|
||||
|
||||
case BRW_SFID_URB:
|
||||
space = 1;
|
||||
err |= control(file, "urb opcode", m_urb_opcode,
|
||||
gen8_urb_opcode(inst), &space);
|
||||
err |= control(file, "urb interleave", m_urb_interleave,
|
||||
gen8_urb_interleave(inst), &space);
|
||||
format(file, " %d %d",
|
||||
gen8_urb_global_offset(inst), gen8_urb_per_slot_offset(inst));
|
||||
break;
|
||||
|
||||
case GEN6_SFID_DATAPORT_RENDER_CACHE: {
|
||||
err |= control(file, "rt message", m_rt_opcode,
|
||||
gen8_rt_message_type(inst), &space);
|
||||
format(file, " %s%sSurface = %d",
|
||||
gen8_rt_slot_group(inst) ? "Hi " : "",
|
||||
gen8_rt_last(inst) ? "LastRT " : "",
|
||||
gen8_binding_table_index(inst));
|
||||
break;
|
||||
}
|
||||
|
||||
case GEN6_SFID_DATAPORT_SAMPLER_CACHE:
|
||||
case GEN6_SFID_DATAPORT_CONSTANT_CACHE:
|
||||
case GEN7_SFID_DATAPORT_DATA_CACHE:
|
||||
format(file, " (%d, 0x%x)",
|
||||
gen8_binding_table_index(inst),
|
||||
gen8_function_control(inst));
|
||||
break;
|
||||
|
||||
default:
|
||||
format(file, "unsupported shared function ID (%d)", sfid);
|
||||
break;
|
||||
}
|
||||
if (space)
|
||||
string(file, " ");
|
||||
format(file, "mlen %d", gen8_mlen(inst));
|
||||
format(file, " rlen %d", gen8_rlen(inst));
|
||||
}
|
||||
pad(file, 64);
|
||||
if (opcode != BRW_OPCODE_NOP) {
|
||||
string(file, "{");
|
||||
space = 1;
|
||||
err |= control(file, "access mode", m_access_mode, gen8_access_mode(inst), &space);
|
||||
err |= control(file, "mask control", m_maskctrl, gen8_mask_control(inst), &space);
|
||||
err |= control(file, "DDClr", m_dep_clear, gen8_no_dd_clear(inst), &space);
|
||||
err |= control(file, "DDChk", m_dep_check, gen8_no_dd_check(inst), &space);
|
||||
|
||||
err |= qtr_ctrl(file, inst);
|
||||
|
||||
err |= control(file, "thread control", m_thread_ctrl, gen8_thread_control(inst), &space);
|
||||
err |= control(file, "acc write control", m_accwr, gen8_acc_wr_control(inst), &space);
|
||||
if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC)
|
||||
err |= control(file, "end of thread", m_eot, gen8_eot(inst), &space);
|
||||
if (space)
|
||||
string(file, " ");
|
||||
string(file, "}");
|
||||
}
|
||||
string(file, ";");
|
||||
newline(file);
|
||||
return err;
|
||||
}
|
||||
Loading…
Add table
Reference in a new issue