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i965: Fix BRW_NEW_NUM_SAMPLES to be in .brw, not .mesa

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This is the wrong kind of dirty bit.  Caught by GCC warnings, due to
64-bit values being truncated to 32 bits.

Fixes: b95b0e2918 (intel/anv,blorp,i965: Implement the SKL 16x MSAA SIMD32 workaround)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
Kenneth Graunke 2018-07-02 14:17:37 -07:00
parent afa8f58921
commit 8e38947f6c
1 changed files with 2 additions and 2 deletions
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4
src/mesa/drivers/dri/i965/genX_state_upload.c
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@ -4073,13 +4073,13 @@ genX(upload_ps)(struct brw_context *brw)
static const struct brw_tracked_state genX(ps_state) = {
.dirty = {
.mesa = _NEW_MULTISAMPLE |
(GEN_GEN >= 9 ? BRW_NEW_NUM_SAMPLES : 0) |
(GEN_GEN < 8 ? _NEW_BUFFERS |
_NEW_COLOR
: 0),
.brw = BRW_NEW_BATCH |
BRW_NEW_BLORP |
BRW_NEW_FS_PROG_DATA,
BRW_NEW_FS_PROG_DATA |
(GEN_GEN >= 9 ? BRW_NEW_NUM_SAMPLES : 0),
},
.emit = genX(upload_ps),
};