From 8e0ff0275df6069004f30f9064ee7cb7dabfb553 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Mon, 4 Apr 2022 11:04:40 -0700 Subject: [PATCH] iris: Use IRIS_DOMAIN_DEPTH_WRITE for read only depth/stencil. We were using IRIS_DOMAIN_OTHER_READ for read-only depth/stencil access in an attempt to avoid unnecessary flushing; IRIS_DOMAIN_DEPTH_WRITE could indicate read-write access. However, IRIS_DOMAIN_OTHER_READ is clearly the wrong domain. Depth and stencil data is read via the depth cache, while IRIS_DOMAIN_OTHER_READ currently corresponds to the sampler cache and constant cache together (although this will change in future patches). It's unclear whether this hack was useful. For now, just drop it and use the correct depth cache domain, even if it's marked as read-write. Reviewed-by: Francisco Jerez Reviewed-by: Rohan Garg Part-of: --- src/gallium/drivers/iris/iris_state.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index 4931bd74037..aaa2f903a83 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -5195,21 +5195,18 @@ pin_depth_and_stencil_buffers(struct iris_batch *batch, iris_get_depth_stencil_resources(zsbuf->texture, &zres, &sres); if (zres) { - const enum iris_domain access = cso_zsa->depth_writes_enabled ? - IRIS_DOMAIN_DEPTH_WRITE : IRIS_DOMAIN_OTHER_READ; iris_use_pinned_bo(batch, zres->bo, cso_zsa->depth_writes_enabled, - access); + IRIS_DOMAIN_DEPTH_WRITE); if (zres->aux.bo) { iris_use_pinned_bo(batch, zres->aux.bo, - cso_zsa->depth_writes_enabled, access); + cso_zsa->depth_writes_enabled, + IRIS_DOMAIN_DEPTH_WRITE); } } if (sres) { - const enum iris_domain access = cso_zsa->stencil_writes_enabled ? - IRIS_DOMAIN_DEPTH_WRITE : IRIS_DOMAIN_OTHER_READ; iris_use_pinned_bo(batch, sres->bo, cso_zsa->stencil_writes_enabled, - access); + IRIS_DOMAIN_DEPTH_WRITE); } }