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r300: Route shader stats output to ARB_debug_output.
This lets us use shader-db to compare stats on shaders, rather than having to manually review the RADEON_DEBUG=pstat output. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14117>
This commit is contained in:
Emma Anholt
Marge Bot
parent
141302e61f
commit
8ddefb8ea5
8 changed files with 32 additions and 43 deletions
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@ -26,6 +26,8 @@
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#include <stdio.h>
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#include <stdlib.h>
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#include "util/u_debug.h"
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#include "pipe/p_state.h"
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#include "radeon_dataflow.h"
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#include "radeon_program.h"
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#include "radeon_program_pair.h"
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@ -417,40 +419,17 @@ static void print_stats(struct radeon_compiler * c)
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{
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struct rc_program_stats s;
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if (c->initial_num_insts <= 5)
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return;
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rc_get_stats(c, &s);
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switch (c->type) {
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case RC_VERTEX_PROGRAM:
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fprintf(stderr,"~~~~~~~~~ VERTEX PROGRAM ~~~~~~~~\n"
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"~%4u Instructions\n"
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"~%4u Flow Control Instructions\n"
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"~%4u Temporary Registers\n"
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"~~~~~~~~~~~~~~ END ~~~~~~~~~~~~~~\n",
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s.num_insts, s.num_fc_insts, s.num_temp_regs);
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break;
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case RC_FRAGMENT_PROGRAM:
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fprintf(stderr,"~~~~~~~~ FRAGMENT PROGRAM ~~~~~~~\n"
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"~%4u Instructions\n"
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"~%4u Vector Instructions (RGB)\n"
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"~%4u Scalar Instructions (Alpha)\n"
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"~%4u Flow Control Instructions\n"
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"~%4u Texture Instructions\n"
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"~%4u Presub Operations\n"
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"~%4u OMOD Operations\n"
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"~%4u Temporary Registers\n"
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"~%4u Inline Literals\n"
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"~~~~~~~~~~~~~~ END ~~~~~~~~~~~~~~\n",
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s.num_insts, s.num_rgb_insts, s.num_alpha_insts,
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s.num_fc_insts, s.num_tex_insts, s.num_presub_ops,
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s.num_omod_ops, s.num_temp_regs, s.num_inline_literals);
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break;
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default:
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assert(0);
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}
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/* Note that we print some dummy values for instruction categories that
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* only the FS has, becasue shader-db's report.py wants all shaders to
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* have the same set.
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*/
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pipe_debug_message(c->debug, SHADER_INFO, "%s shader: %d inst, %d vinst, %d sinst, %d flowcontrol, %d tex, %d presub, %d omod, %d temps, %d lits",
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c->type == RC_VERTEX_PROGRAM ? "VS" : "FS",
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s.num_insts, s.num_rgb_insts, s.num_alpha_insts,
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s.num_fc_insts, s.num_tex_insts, s.num_presub_ops,
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s.num_omod_ops, s.num_temp_regs, s.num_inline_literals);
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}
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static const char *shader_name[RC_NUM_PROGRAM_TYPES] = {
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@ -481,7 +460,6 @@ void rc_run_compiler(struct radeon_compiler *c, struct radeon_compiler_pass *lis
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struct rc_program_stats s;
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rc_get_stats(c, &s);
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c->initial_num_insts = s.num_insts;
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if (c->Debug & RC_DBG_LOG) {
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fprintf(stderr, "%s: before compilation\n", shader_name[c->type]);
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@ -490,8 +468,7 @@ void rc_run_compiler(struct radeon_compiler *c, struct radeon_compiler_pass *lis
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rc_run_compiler_passes(c, list);
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if (c->Debug & RC_DBG_STATS)
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print_stats(c);
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print_stats(c);
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}
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void rc_validate_final_shader(struct radeon_compiler *c, void *user)
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@ -29,7 +29,6 @@
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#include "radeon_emulate_loops.h"
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#define RC_DBG_LOG (1 << 0)
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#define RC_DBG_STATS (1 << 1)
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struct rc_swizzle_caps;
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@ -43,6 +42,7 @@ struct radeon_compiler {
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struct memory_pool Pool;
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struct rc_program Program;
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const struct rc_regalloc_state *regalloc_state;
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struct pipe_debug_callback *debug;
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enum rc_program_type type;
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unsigned Debug:2;
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unsigned Error:1;
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@ -72,8 +72,6 @@ struct radeon_compiler {
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/*@}*/
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struct emulate_loop_state loop_state;
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unsigned initial_num_insts; /* Number of instructions at start. */
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};
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void rc_init(struct radeon_compiler * c, const struct rc_regalloc_state *rs);
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@ -368,6 +368,18 @@ static void r300_init_states(struct pipe_context *pipe)
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}
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}
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static void
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r300_set_debug_callback(struct pipe_context *context,
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const struct pipe_debug_callback *cb)
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{
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struct r300_context *r300 = r300_context(context);
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if (cb)
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r300->debug = *cb;
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else
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memset(&r300->debug, 0, sizeof(r300->debug));
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}
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struct pipe_context* r300_create_context(struct pipe_screen* screen,
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void *priv, unsigned flags)
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{
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@ -383,6 +395,7 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen,
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r300->context.screen = screen;
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r300->context.priv = priv;
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r300->context.set_debug_callback = r300_set_debug_callback;
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r300->context.destroy = r300_destroy_context;
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@ -547,6 +547,8 @@ struct r300_context {
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/* Occlusion query. */
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struct r300_atom query_start;
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struct pipe_debug_callback debug;
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/* The pointers to the first and the last atom. */
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struct r300_atom *first_dirty, *last_dirty;
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@ -30,7 +30,6 @@ static const struct debug_named_value r300_debug_options[] = {
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{ "info", DBG_INFO, "Print hardware info (printed by default on debug builds"},
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{ "fp", DBG_FP, "Log fragment program compilation" },
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{ "vp", DBG_VP, "Log vertex program compilation" },
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{ "pstat", DBG_P_STAT, "Log vertex/fragment program stats" },
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{ "draw", DBG_DRAW, "Log draw calls" },
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{ "swtcl", DBG_SWTCL, "Log SWTCL-specific info" },
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{ "rsblock", DBG_RS_BLOCK, "Log rasterizer registers" },
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@ -429,10 +429,11 @@ static void r300_translate_fragment_shader(
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memset(&compiler, 0, sizeof(compiler));
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rc_init(&compiler.Base, &r300->fs_regalloc_state);
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DBG_ON(r300, DBG_FP) ? compiler.Base.Debug |= RC_DBG_LOG : 0;
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DBG_ON(r300, DBG_P_STAT) ? compiler.Base.Debug |= RC_DBG_STATS : 0;
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compiler.code = &shader->code;
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compiler.state = shader->compare_state;
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if (!shader->dummy)
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compiler.Base.debug = &r300->debug;
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compiler.Base.is_r500 = r300->screen->caps.is_r500;
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compiler.Base.is_r400 = r300->screen->caps.is_r400;
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compiler.Base.disable_optimizations = DBG_ON(r300, DBG_NO_OPT);
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@ -103,8 +103,6 @@ radeon_winsys(struct pipe_screen *screen) {
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#define DBG_NO_ZMASK (1 << 21)
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#define DBG_NO_HIZ (1 << 22)
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#define DBG_NO_CMASK (1 << 23)
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/* Statistics. */
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#define DBG_P_STAT (1 << 25)
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/*@}*/
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static inline boolean SCREEN_DBG_ON(struct r300_screen * screen, unsigned flags)
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@ -214,9 +214,10 @@ void r300_translate_vertex_shader(struct r300_context *r300,
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rc_init(&compiler.Base, NULL);
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DBG_ON(r300, DBG_VP) ? compiler.Base.Debug |= RC_DBG_LOG : 0;
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DBG_ON(r300, DBG_P_STAT) ? compiler.Base.Debug |= RC_DBG_STATS : 0;
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compiler.code = &vs->code;
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compiler.UserData = vs;
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if (!vs->dummy)
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compiler.Base.debug = &r300->debug;
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compiler.Base.is_r500 = r300->screen->caps.is_r500;
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compiler.Base.disable_optimizations = DBG_ON(r300, DBG_NO_OPT);
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compiler.Base.has_half_swizzles = FALSE;
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