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etnaviv: support GL_ARB_seamless_cubemap_per_texture

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Passes spec@amd_seamless_cubemap_per_texture@amd_seamless_cubemap_per_texture

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-By: Guido Günther <agx@sigxcpu.org>
This commit is contained in:
Christian Gmeiner 2019-06-03 07:42:06 +02:00
parent a13efb3cdb
commit 8dd26fa2f0
3 changed files with 10 additions and 6 deletions
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2
docs/features.txt
View file

@ -306,7 +306,7 @@ Khronos, ARB, and OES extensions that are not part of any OpenGL or OpenGL ES ve
GL_ARB_post_depth_coverage DONE (i965, nvc0) GL_ARB_post_depth_coverage DONE (i965, nvc0)
GL_ARB_robustness_isolation not started GL_ARB_robustness_isolation not started
GL_ARB_sample_locations DONE (nvc0) GL_ARB_sample_locations DONE (nvc0)
GL_ARB_seamless_cubemap_per_texture DONE (freedreno, i965, nvc0, radeonsi, r600, softpipe, swr, virgl) GL_ARB_seamless_cubemap_per_texture DONE (etnaviv/SEAMLESS_CUBE_MAP, freedreno, i965, nvc0, radeonsi, r600, softpipe, swr, virgl)
GL_ARB_shader_ballot DONE (i965/gen8+, nvc0, radeonsi) GL_ARB_shader_ballot DONE (i965/gen8+, nvc0, radeonsi)
GL_ARB_shader_clock DONE (i965/gen7+, nv50, nvc0, r600, radeonsi, virgl) GL_ARB_shader_clock DONE (i965/gen7+, nv50, nvc0, r600, radeonsi, virgl)
GL_ARB_shader_stencil_export DONE (i965/gen9+, r600, radeonsi, softpipe, llvmpipe, swr, virgl) GL_ARB_shader_stencil_export DONE (i965/gen9+, r600, radeonsi, softpipe, llvmpipe, swr, virgl)

2
src/gallium/drivers/etnaviv/etnaviv_screen.c
View file

@ -200,6 +200,8 @@ etna_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET: case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
case PIPE_CAP_MAX_TEXEL_OFFSET: case PIPE_CAP_MAX_TEXEL_OFFSET:
return 7; return 7;
case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
return VIV_FEATURE(screen, chipMinorFeatures2, SEAMLESS_CUBE_MAP);
/* Timer queries. */ /* Timer queries. */
case PIPE_CAP_OCCLUSION_QUERY: case PIPE_CAP_OCCLUSION_QUERY:

8
src/gallium/drivers/etnaviv/etnaviv_texture_state.c
View file

@ -55,8 +55,10 @@ etna_create_sampler_state_state(struct pipe_context *pipe,
VIVS_TE_SAMPLER_CONFIG0_MIP(translate_texture_mipfilter(ss->min_mip_filter)) | VIVS_TE_SAMPLER_CONFIG0_MIP(translate_texture_mipfilter(ss->min_mip_filter)) |
VIVS_TE_SAMPLER_CONFIG0_MAG(translate_texture_filter(ss->mag_img_filter)) | VIVS_TE_SAMPLER_CONFIG0_MAG(translate_texture_filter(ss->mag_img_filter)) |
COND(ss->normalized_coords, VIVS_TE_SAMPLER_CONFIG0_ROUND_UV); COND(ss->normalized_coords, VIVS_TE_SAMPLER_CONFIG0_ROUND_UV);
cs->TE_SAMPLER_CONFIG1 = 0; /* VIVS_TE_SAMPLER_CONFIG1 (swizzle, extended
format) fully determined by sampler view */ cs->TE_SAMPLER_CONFIG1 =
COND(ss->seamless_cube_map, VIVS_TE_SAMPLER_CONFIG1_SEAMLESS_CUBE_MAP);
cs->TE_SAMPLER_LOD_CONFIG = cs->TE_SAMPLER_LOD_CONFIG =
COND(ss->lod_bias != 0.0, VIVS_TE_SAMPLER_LOD_CONFIG_BIAS_ENABLE) | COND(ss->lod_bias != 0.0, VIVS_TE_SAMPLER_LOD_CONFIG_BIAS_ENABLE) |
VIVS_TE_SAMPLER_LOD_CONFIG_BIAS(etna_float_to_fixp55(ss->lod_bias)); VIVS_TE_SAMPLER_LOD_CONFIG_BIAS(etna_float_to_fixp55(ss->lod_bias));
@ -142,7 +144,7 @@ etna_create_sampler_view_state(struct pipe_context *pctx, struct pipe_resource *
memset(&sv->TE_SAMPLER_LINEAR_STRIDE, 0, sizeof(sv->TE_SAMPLER_LINEAR_STRIDE)); memset(&sv->TE_SAMPLER_LINEAR_STRIDE, 0, sizeof(sv->TE_SAMPLER_LINEAR_STRIDE));
} }
sv->TE_SAMPLER_CONFIG1 = COND(ext, VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT(format)) | sv->TE_SAMPLER_CONFIG1 |= COND(ext, VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT(format)) |
COND(astc, VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT(TEXTURE_FORMAT_EXT_ASTC)) | COND(astc, VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT(TEXTURE_FORMAT_EXT_ASTC)) |
VIVS_TE_SAMPLER_CONFIG1_HALIGN(res->halign) | swiz; VIVS_TE_SAMPLER_CONFIG1_HALIGN(res->halign) | swiz;
sv->TE_SAMPLER_ASTC0 = COND(astc, VIVS_NTE_SAMPLER_ASTC0_ASTC_FORMAT(format)) | sv->TE_SAMPLER_ASTC0 = COND(astc, VIVS_NTE_SAMPLER_ASTC0_ASTC_FORMAT(format)) |