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https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-04 22:49:13 +02:00
cell: remove old disassembly/dump code; use dumper code in SPE emitter.
This commit is contained in:
Brian Paul
parent
8b5013d232
commit
8d768c5101
1 changed files with 28 additions and 76 deletions
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@ -125,11 +125,13 @@ get_const_one_reg(struct codegen *gen)
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if (gen->one_reg <= 0) {
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gen->one_reg = spe_allocate_available_register(gen->f);
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spe_indent(gen->f, 4);
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spe_comment(gen->f, -4, "INIT CONSTANT 1.0:");
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/* one = {1.0, 1.0, 1.0, 1.0} */
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spe_load_float(gen->f, gen->one_reg, 1.0f);
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#if DISASSEM
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printf("\til\tr%d, 1.0f\n", gen->one_reg);
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#endif
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spe_indent(gen->f, -4);
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}
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return gen->one_reg;
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@ -149,12 +151,13 @@ get_exec_mask_reg(struct codegen *gen)
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if (gen->exec_mask_reg <= 0) {
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gen->exec_mask_reg = spe_allocate_available_register(gen->f);
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spe_indent(gen->f, 4);
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spe_comment(gen->f, -4, "INIT EXEC MASK = ~0:");
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/* exec_mask = {~0, ~0, ~0, ~0} */
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spe_load_int(gen->f, gen->exec_mask_reg, ~0);
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#if DISASSEM
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printf("INIT EXEC MASK:\n");
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printf("\tload\tr%d, 0x%x\n", gen->exec_mask_reg, ~0);
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#endif
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spe_indent(gen->f, -4);
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}
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return gen->exec_mask_reg;
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@ -192,9 +195,6 @@ get_src_reg(struct codegen *gen,
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reg = get_itemp(gen);
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/* Load: reg = memory[(machine_reg) + offset] */
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spe_lqd(gen->f, reg, gen->inputs_reg, offset);
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#if DISASSEM
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printf("\tlqd\tr%d, r%d + %d\n", reg, gen->inputs_reg, offset);
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#endif
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}
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break;
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case TGSI_FILE_IMMEDIATE:
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@ -262,10 +262,6 @@ store_dest_reg(struct codegen *gen,
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* d[i] = mask_reg[i] ? value_reg : d_reg
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*/
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spe_selb(gen->f, d_reg, d_reg, value_reg, exec_reg);
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#if DISASSEM
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printf("\tselb\tr%d, r%d, r%d, r%d # EXEC MASK'ed\n",
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d_reg, d_reg, value_reg, exec_reg);
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#endif
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}
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else {
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/* we're not inside a condition or loop: do nothing special */
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@ -288,22 +284,10 @@ store_dest_reg(struct codegen *gen,
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spe_selb(gen->f, curval_reg, curval_reg, value_reg, exec_reg);
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/* Store: memory[(machine_reg) + offset] = curval */
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spe_stqd(gen->f, curval_reg, gen->outputs_reg, offset);
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#if DISASSEM
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printf("\tlqd\tr%d, r%d + %d\n",
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curval_reg, gen->outputs_reg, offset);
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printf("\tselb\tr%d, r%d, r%d, r%d # EXEC MASK'ed\n",
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curval_reg, curval_reg, value_reg, exec_reg);
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printf("\tstqd\tr%d, r%d + %d\n",
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curval_reg, gen->outputs_reg, offset);
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#endif
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}
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else {
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/* Store: memory[(machine_reg) + offset] = reg */
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spe_stqd(gen->f, value_reg, gen->outputs_reg, offset);
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#if DISASSEM
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printf("\tstqd\tr%d, r%d + %d\n",
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value_reg, gen->outputs_reg, offset);
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#endif
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}
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}
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break;
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@ -317,18 +301,13 @@ static boolean
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emit_MOV(struct codegen *gen, const struct tgsi_full_instruction *inst)
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{
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int ch;
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#if DISASSEM
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printf("MOV:\n");
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#endif
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spe_comment(gen->f, -4, "MOV:");
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for (ch = 0; ch < 4; ch++) {
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if (inst->FullDstRegisters[0].DstRegister.WriteMask & (1 << ch)) {
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int src_reg = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
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int dst_reg = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
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/* XXX we don't always need to actually emit a mov instruction here */
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spe_move(gen->f, dst_reg, src_reg);
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#if DISASSEM
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printf("\tmov\tr%d, r%d\n", dst_reg, src_reg);
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#endif
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store_dest_reg(gen, dst_reg, ch, &inst->FullDstRegisters[0]);
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free_itemps(gen);
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}
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@ -347,9 +326,7 @@ static boolean
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emit_ADD(struct codegen *gen, const struct tgsi_full_instruction *inst)
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{
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int ch;
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#if DISASSEM
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printf("ADD:\n");
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#endif
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spe_comment(gen->f, -4, "ADD:");
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/* Loop over Red/Green/Blue/Alpha channels */
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for (ch = 0; ch < 4; ch++) {
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/* If the dest R, G, B or A writemask is enabled... */
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@ -361,9 +338,6 @@ emit_ADD(struct codegen *gen, const struct tgsi_full_instruction *inst)
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/* Emit actual SPE instruction: d = s1 + s2 */
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spe_fa(gen->f, d_reg, s1_reg, s2_reg);
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#if DISASSEM
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printf("\tfa\tr%d, r%d, r%d\n", d_reg, s1_reg, s2_reg);
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#endif
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/* Store the result (a no-op for TGSI_FILE_TEMPORARY dests) */
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store_dest_reg(gen, d_reg, ch, &inst->FullDstRegisters[0]);
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@ -382,9 +356,7 @@ static boolean
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emit_MUL(struct codegen *gen, const struct tgsi_full_instruction *inst)
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{
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int ch;
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#if DISASSEM
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printf("MUL:\n");
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#endif
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spe_comment(gen->f, -4, "MUL:");
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for (ch = 0; ch < 4; ch++) {
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if (inst->FullDstRegisters[0].DstRegister.WriteMask & (1 << ch)) {
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int s1_reg = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
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@ -392,9 +364,6 @@ emit_MUL(struct codegen *gen, const struct tgsi_full_instruction *inst)
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int d_reg = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
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/* d = s1 * s2 */
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spe_fm(gen->f, d_reg, s1_reg, s2_reg);
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#if DISASSEM
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printf("\tfm\tr%d, r%d, r%d\n", d_reg, s1_reg, s2_reg);
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#endif
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store_dest_reg(gen, d_reg, ch, &inst->FullDstRegisters[0]);
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free_itemps(gen);
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}
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@ -414,9 +383,8 @@ emit_SGT(struct codegen *gen, const struct tgsi_full_instruction *inst)
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{
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int ch;
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#if DISASSEM
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printf("SGT:\n");
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#endif
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spe_comment(gen->f, -4, "SGT:");
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for (ch = 0; ch < 4; ch++) {
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if (inst->FullDstRegisters[0].DstRegister.WriteMask & (1 << ch)) {
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int s1_reg = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
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@ -425,16 +393,10 @@ emit_SGT(struct codegen *gen, const struct tgsi_full_instruction *inst)
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/* d = (s1 > s2) */
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spe_fcgt(gen->f, d_reg, s1_reg, s2_reg);
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#if DISASSEM
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printf("\tfcgt\tr%d, r%d, r%d\n", d_reg, s1_reg, s2_reg);
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#endif
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/* convert d from 0x0/0xffffffff to 0.0/1.0 */
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/* d = d & one_reg */
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spe_and(gen->f, d_reg, d_reg, get_const_one_reg(gen));
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#if DISASSEM
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printf("\tand\tr%d, r%d, r%d\n", d_reg, d_reg, get_const_one_reg(gen));
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#endif
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store_dest_reg(gen, d_reg, ch, &inst->FullDstRegisters[0]);
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free_itemps(gen);
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@ -451,6 +413,8 @@ emit_IF(struct codegen *gen, const struct tgsi_full_instruction *inst)
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const int channel = 0;
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const int exec_reg = get_exec_mask_reg(gen);
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spe_comment(gen->f, -4, "IF:");
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/* update execution mask with the predicate register */
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int tmp_reg = spe_allocate_available_register(gen->f);
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int s1_reg = get_src_reg(gen, channel, &inst->FullSrcRegisters[0]);
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@ -461,12 +425,6 @@ emit_IF(struct codegen *gen, const struct tgsi_full_instruction *inst)
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spe_complement(gen->f, tmp_reg);
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/* exec_mask = exec_mask & tmp */
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spe_and(gen->f, exec_reg, exec_reg, tmp_reg);
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#if DISASSEM
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printf("IF:\n");
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printf("\tseqi\tr%d, r%d, 0;\n", tmp_reg, s1_reg);
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printf("\tcomp\tr%d\n", tmp_reg);
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printf("\tand\tr%d, r%d, r%d\n", exec_reg, exec_reg, tmp_reg);
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#endif
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gen->if_nesting++;
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@ -481,12 +439,11 @@ emit_ELSE(struct codegen *gen, const struct tgsi_full_instruction *inst)
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{
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const int exec_reg = get_exec_mask_reg(gen);
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spe_comment(gen->f, -4, "ELSE:");
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/* exec_mask = !exec_mask */
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spe_complement(gen->f, exec_reg);
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#if DISASSEM
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printf("ELSE:\n");
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printf("\tcomp\tr%d;\n", exec_reg);
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#endif
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return true;
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}
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@ -496,13 +453,11 @@ emit_ENDIF(struct codegen *gen, const struct tgsi_full_instruction *inst)
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{
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const int exec_reg = get_exec_mask_reg(gen);
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spe_comment(gen->f, -4, "ENDIF:");
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/* XXX todo: pop execution mask */
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spe_load_int(gen->f, exec_reg, ~0x0);
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#if DISASSEM
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printf("ENDIF:\n");
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printf("\tli\tr%d, ~0x0\n", exec_reg);
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#endif
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gen->if_nesting--;
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return true;
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@ -515,6 +470,8 @@ emit_DDX_DDY(struct codegen *gen, const struct tgsi_full_instruction *inst,
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{
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int ch;
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spe_comment(gen->f, -4, ddx ? "DDX:" : "DDY:");
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for (ch = 0; ch < 4; ch++) {
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if (inst->FullDstRegisters[0].DstRegister.WriteMask & (1 << ch)) {
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int s_reg = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
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@ -552,11 +509,9 @@ emit_DDX_DDY(struct codegen *gen, const struct tgsi_full_instruction *inst,
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static boolean
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emit_END(struct codegen *gen)
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{
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spe_comment(gen->f, -4, "END:");
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/* return from function call */
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spe_bi(gen->f, SPE_REG_RA, 0, 0);
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#if DISASSEM
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printf("\tbi\trRA\n");
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#endif
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return true;
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}
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@ -616,9 +571,7 @@ emit_immediate(struct codegen *gen, const struct tgsi_full_immediate *immed)
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assert(gen->num_imm < MAX_TEMPS);
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#if DISASSEM
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printf("IMMEDIATE %d:\n", gen->num_imm);
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#endif
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spe_comment(gen->f, -4, "IMMEDIATE:");
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for (ch = 0; ch < 4; ch++) {
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float val = immed->u.ImmediateFloat32[ch].Float;
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@ -632,9 +585,6 @@ emit_immediate(struct codegen *gen, const struct tgsi_full_immediate *immed)
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/* emit initializer instruction */
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spe_load_float(gen->f, reg, val);
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#if DISASSEM
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printf("\tload\tr%d, %f\n", reg, val);
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#endif
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}
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gen->num_imm++;
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@ -722,6 +672,8 @@ cell_gen_fragment_program(struct cell_context *cell,
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spe_allocate_register(f, gen.constants_reg);
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#if DISASSEM
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spe_print_code(f, true);
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spe_indent(f, 8);
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printf("Begin %s\n", __FUNCTION__);
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tgsi_dump(tokens, 0);
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#endif
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