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ac/nir: expand 64-bit vec3 loads to fix shuffling.

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If loading 64-bit vec3 values, a 4 component load would be followed
by a 2 component load and the resulting shuffle would fail as it
requires 2 4 components. This just expands the second results
vector out to 4 components.

This fixes 100 CTS tests:
dEQP-VK.spirv_assembly.type.vec3.*64*

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
Dave Airlie 2018-04-30 12:45:14 +10:00
parent bde12f75e1
commit 8d3529872c
1 changed files with 5 additions and 0 deletions
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5
src/amd/common/ac_nir_to_llvm.c
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@ -1572,6 +1572,11 @@ static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
LLVMConstInt(ctx->ac.i32, 6, false), LLVMConstInt(ctx->ac.i32, 7, false)
};
if (num_components == 6) {
/* we end up with a v4f32 and v2f32 but shuffle fails on that */
results[1] = ac_build_expand_to_vec4(&ctx->ac, results[1], 4);
}
LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
ret = LLVMBuildShuffleVector(ctx->ac.builder, results[0],
results[num_components > 4 ? 1 : 0], swizzle, "");