diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index 186445dc8c1..88c32e4ccd0 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -10521,7 +10521,7 @@ export_vs_varying(isel_context* ctx, int slot, bool is_pos, int* next_pos)
 
 static void
 export_vs_psiz_layer_viewport_vrs(isel_context* ctx, int* next_pos,
-                                  const radv_vs_output_info* outinfo)
+                                  const aco_vp_output_info* outinfo)
 {
    aco_ptr<Export_instruction> exp{
       create_instruction<Export_instruction>(aco_opcode::exp, Format::EXP, 4, 0)};
@@ -10568,7 +10568,7 @@ static void
 create_vs_exports(isel_context* ctx)
 {
    assert(ctx->stage.hw == HWStage::VS || ctx->stage.hw == HWStage::NGG);
-   const radv_vs_output_info* outinfo =
+   const aco_vp_output_info* outinfo =
       ctx->stage.has(SWStage::GS) ? &ctx->program->info.vs.outinfo :
       ctx->stage.has(SWStage::TES) ? &ctx->program->info.tes.outinfo :
       ctx->stage.has(SWStage::MS) ? &ctx->program->info.ms.outinfo :
@@ -10627,7 +10627,7 @@ static void
 create_primitive_exports(isel_context *ctx, Temp prim_ch1)
 {
    assert(ctx->stage.hw == HWStage::NGG);
-   const radv_vs_output_info* outinfo =
+   const aco_vp_output_info* outinfo =
       ctx->stage.has(SWStage::GS) ? &ctx->program->info.vs.outinfo :
       ctx->stage.has(SWStage::TES) ? &ctx->program->info.tes.outinfo :
       ctx->stage.has(SWStage::MS) ? &ctx->program->info.ms.outinfo :
diff --git a/src/amd/compiler/aco_instruction_selection_setup.cpp b/src/amd/compiler/aco_instruction_selection_setup.cpp
index f6cf057a8b1..059ab516ca0 100644
--- a/src/amd/compiler/aco_instruction_selection_setup.cpp
+++ b/src/amd/compiler/aco_instruction_selection_setup.cpp
@@ -248,7 +248,7 @@ get_reg_class(isel_context* ctx, RegType type, unsigned components, unsigned bit
 
 void
 setup_vs_output_info(isel_context* ctx, nir_shader* nir,
-                     const radv_vs_output_info* outinfo)
+                     const aco_vp_output_info* outinfo)
 {
    ctx->export_clip_dists = outinfo->export_clip_dists;
    ctx->num_clip_distances = util_bitcount(outinfo->clip_dist_mask);
diff --git a/src/amd/compiler/aco_shader_info.h b/src/amd/compiler/aco_shader_info.h
index 61963f370cd..e46a7be5253 100644
--- a/src/amd/compiler/aco_shader_info.h
+++ b/src/amd/compiler/aco_shader_info.h
@@ -35,6 +35,24 @@
 extern "C" {
 #endif
 
+struct aco_vp_output_info {
+   uint8_t vs_output_param_offset[VARYING_SLOT_MAX];
+   uint8_t clip_dist_mask;
+   uint8_t cull_dist_mask;
+   uint8_t param_exports;
+   uint8_t prim_param_exports;
+   bool writes_pointsize;
+   bool writes_layer;
+   bool writes_layer_per_primitive;
+   bool writes_viewport_index;
+   bool writes_viewport_index_per_primitive;
+   bool writes_primitive_shading_rate;
+   bool writes_primitive_shading_rate_per_primitive;
+   bool export_prim_id;
+   bool export_prim_id_per_primitive;
+   bool export_clip_dists;
+};
+
 struct aco_stream_output {
    uint8_t location;
    uint8_t buffer;
@@ -55,7 +73,7 @@ struct aco_shader_info {
    uint32_t num_tess_patches;
    unsigned workgroup_size;
    struct {
-      struct radv_vs_output_info outinfo;
+      struct aco_vp_output_info outinfo;
       bool tcs_in_out_eq;
       uint64_t tcs_temp_only_input_mask;
       bool use_per_attribute_vb_descs;
@@ -73,7 +91,7 @@ struct aco_shader_info {
       uint32_t num_lds_blocks;
    } tcs;
    struct {
-      struct radv_vs_output_info outinfo;
+      struct aco_vp_output_info outinfo;
    } tes;
    struct {
       bool writes_z;
@@ -86,7 +104,7 @@ struct aco_shader_info {
       uint8_t subgroup_size;
    } cs;
    struct {
-      struct radv_vs_output_info outinfo;
+      struct aco_vp_output_info outinfo;
    } ms;
    struct aco_streamout_info so;
 
diff --git a/src/amd/vulkan/radv_aco_shader_info.h b/src/amd/vulkan/radv_aco_shader_info.h
index 54bdeebc2e1..20975f07ba8 100644
--- a/src/amd/vulkan/radv_aco_shader_info.h
+++ b/src/amd/vulkan/radv_aco_shader_info.h
@@ -44,6 +44,29 @@ radv_aco_convert_shader_so_info(struct aco_shader_info *aco_info,
    /* enabled_stream_buffers_mask unused */
 }
 
+static inline void
+radv_aco_convert_shader_vp_info(struct aco_vp_output_info *aco_info,
+				const struct radv_vs_output_info *radv)
+{
+   ASSIGN_FIELD_CP(vs_output_param_offset);
+   ASSIGN_FIELD(clip_dist_mask);
+   ASSIGN_FIELD(cull_dist_mask);
+   ASSIGN_FIELD(param_exports);
+   ASSIGN_FIELD(prim_param_exports);
+   ASSIGN_FIELD(writes_pointsize);
+   ASSIGN_FIELD(writes_layer);
+   ASSIGN_FIELD(writes_layer_per_primitive);
+   ASSIGN_FIELD(writes_viewport_index);
+   ASSIGN_FIELD(writes_viewport_index_per_primitive);
+   ASSIGN_FIELD(writes_primitive_shading_rate);
+   ASSIGN_FIELD(writes_primitive_shading_rate_per_primitive);
+   ASSIGN_FIELD(export_prim_id);
+   ASSIGN_FIELD(export_prim_id_per_primitive);
+   ASSIGN_FIELD(export_clip_dists);
+   /* don't use export params */
+}
+
+#define ASSIGN_OUTINFO(x) radv_aco_convert_shader_vp_info(&aco_info->x.outinfo, &radv->x.outinfo);
 static inline void
 radv_aco_convert_shader_info(struct aco_shader_info *aco_info,
 			     const struct radv_shader_info *radv)
@@ -52,7 +75,7 @@ radv_aco_convert_shader_info(struct aco_shader_info *aco_info,
    ASSIGN_FIELD(has_ngg_early_prim_export);
    ASSIGN_FIELD(num_tess_patches);
    ASSIGN_FIELD(workgroup_size);
-   ASSIGN_FIELD(vs.outinfo);
+   ASSIGN_OUTINFO(vs);
    ASSIGN_FIELD(vs.tcs_in_out_eq);
    ASSIGN_FIELD(vs.tcs_temp_only_input_mask);
    ASSIGN_FIELD(vs.use_per_attribute_vb_descs);
@@ -64,18 +87,19 @@ radv_aco_convert_shader_info(struct aco_shader_info *aco_info,
    ASSIGN_FIELD_CP(gs.output_streams);
    ASSIGN_FIELD(gs.vertices_out);
    ASSIGN_FIELD(tcs.num_lds_blocks);
-   ASSIGN_FIELD(tes.outinfo);
+   ASSIGN_OUTINFO(tes);
    ASSIGN_FIELD(ps.writes_z);
    ASSIGN_FIELD(ps.writes_stencil);
    ASSIGN_FIELD(ps.writes_sample_mask);
    ASSIGN_FIELD(ps.num_interp);
    ASSIGN_FIELD(ps.spi_ps_input);
    ASSIGN_FIELD(cs.subgroup_size);
-   ASSIGN_FIELD(ms.outinfo);
+   ASSIGN_OUTINFO(ms);
    radv_aco_convert_shader_so_info(aco_info, radv);
    aco_info->gfx9_gs_ring_lds_size = radv->gs_ring_info.lds_size;
 }
 #undef ASSIGN_FIELD
 #undef ASSIGN_FIELD_CP
+#undef ASSIGN_OUTINFO
 
 #endif