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nvc0: allow only one active query for the MP counters group

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Because we can't expose the number of hardware counters needed for each
different query, we don't want to allow more than one active query
simultaneously to avoid failure when the maximum number of counters
is reached. Note that these groups of GPU counters are currently only
used by AMD_performance_monitor.

Like for Kepler, this limits the maximum number of active queries
to 1 on Fermi.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
This commit is contained in:
Samuel Pitoiset 2015-09-28 17:29:37 +02:00
parent cef22f3490
commit 8cd4b8478a
1 changed files with 9 additions and 11 deletions
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20
src/gallium/drivers/nouveau/nvc0/nvc0_query.c
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@ -371,22 +371,20 @@ nvc0_screen_get_driver_query_group_info(struct pipe_screen *pscreen,
info->name = "MP counters";
info->type = PIPE_DRIVER_QUERY_GROUP_TYPE_GPU;
/* Because we can't expose the number of hardware counters needed for
* each different query, we don't want to allow more than one active
* query simultaneously to avoid failure when the maximum number of
* counters is reached. Note that these groups of GPU counters are
* currently only used by AMD_performance_monitor.
*/
info->max_active_queries = 1;
if (screen->base.class_3d == NVE4_3D_CLASS) {
info->num_queries = NVE4_HW_SM_QUERY_COUNT;
/* On NVE4+, each multiprocessor have 8 hardware counters separated
* in two distinct domains, but we allow only one active query
* simultaneously because some of them use more than one hardware
* counter and this will result in an undefined behaviour. */
info->max_active_queries = 1; /* TODO: handle multiple hw counters */
return 1;
return 1;
} else
if (screen->base.class_3d < NVE4_3D_CLASS) {
info->num_queries = NVC0_HW_SM_QUERY_COUNT;
/* On NVC0:NVE4, each multiprocessor have 8 hardware counters
* in a single domain. */
info->max_active_queries = 8;
return 1;
}
}