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i965/fs: Apply source modifier workarounds to POW as well.

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Single-operand math already had these workarounds, but POW (the only two
operand function) did not.  It needs them too - otherwise we can hit
assertion failures in brw_eu_emit.c when code is actually generated.

NOTE: This is a candidate for the 7.10 branch.

Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 72cd7e87d3)
This commit is contained in:
Kenneth Graunke 2011-02-19 01:03:08 -08:00 • committed by Ian Romanick
parent aa180f2786
commit 8bf3a4f05e
1 changed files with 7 additions and 3 deletions
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10
src/mesa/drivers/dri/i965/brw_fs.cpp
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@ -660,14 +660,18 @@ fs_visitor::emit_math(fs_opcodes opcode, fs_reg dst, fs_reg src0, fs_reg src1)
assert(opcode == FS_OPCODE_POW);
if (intel->gen >= 6) {
/* Can't do hstride == 0 args to gen6 math, so expand it out. */
if (src0.file == UNIFORM) {
/* Can't do hstride == 0 args to gen6 math, so expand it out.
*
* The hardware ignores source modifiers (negate and abs) on math
* instructions, so we also move to a temp to set those up.
*/
if (src0.file == UNIFORM || src0.abs || src0.negate) {
fs_reg expanded = fs_reg(this, glsl_type::float_type);
emit(fs_inst(BRW_OPCODE_MOV, expanded, src0));
src0 = expanded;
}
if (src1.file == UNIFORM) {
if (src1.file == UNIFORM || src1.abs || src1.negate) {
fs_reg expanded = fs_reg(this, glsl_type::float_type);
emit(fs_inst(BRW_OPCODE_MOV, expanded, src1));
src1 = expanded;