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radv: add lowering for nir_intrinsic_load_ring_attr_{offset}_amd

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19173>
This commit is contained in:
Samuel Pitoiset 2022-05-11 15:15:11 +02:00 • committed by Marge Bot
parent 09033c7b22
commit 8bf1aa1b76
1 changed files with 15 additions and 0 deletions
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15
src/amd/vulkan/radv_nir_lower_abi.c
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@ -112,6 +112,21 @@ lower_abi_instr(nir_builder *b, nir_instr *instr, void *state)
case nir_intrinsic_load_ring_es2gs_offset_amd:
replacement = ac_nir_load_arg(b, &s->args->ac, s->args->ac.es2gs_offset);
break;
case nir_intrinsic_load_ring_attr_amd:
if (s->use_llvm)
break;
replacement = load_ring(b, RING_PS_ATTR, s);
break;
case nir_intrinsic_load_ring_attr_offset_amd: {
nir_ssa_def *ring_attr_offset = ac_nir_load_arg(b, &s->args->ac, s->args->ac.gs_attr_offset);
replacement = nir_ishl(b, nir_ubfe(b, ring_attr_offset, nir_imm_int(b, 0), nir_imm_int(b, 15)),
nir_imm_int(b, 9)); /* 512b increments. */
break;
}
case nir_intrinsic_load_tess_rel_patch_id_amd:
if (stage == MESA_SHADER_TESS_CTRL) {
replacement = nir_extract_u8(b, ac_nir_load_arg(b, &s->args->ac, s->args->ac.tcs_rel_ids),